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公开(公告)号:US10466301B1
公开(公告)日:2019-11-05
申请号:US16181241
申请日:2018-11-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: June-Hee Lee , Byungwook Cho , Bongkyu Kim
IPC: H04B17/00 , H04L25/03 , G01R31/317 , H04B1/16
Abstract: A receiver includes a sampler that samples first voltage levels corresponding to a first logical value of data and second voltage levels corresponding to a second logical value of the data, based on a sampling clock. An equalizer receives and adjusts the first and second voltage levels. A clock and data recovery circuit recovers the sampling clock, based on the first and second voltage levels from the equalizer. An eye opening measurement circuit: (1) tracks a first sigma level by a first step unit depending on upper voltage levels greater than a first reference voltage level among the first voltage levels, (2) tracks a second sigma level by a second step unit depending on lower voltage levels less than a second reference voltage level among the second voltage levels, and (3) calculates a difference between the first sigma level and the second sigma level.
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公开(公告)号:US10809297B2
公开(公告)日:2020-10-20
申请号:US16669958
申请日:2019-10-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: June-Hee Lee , Byungwook Cho , Bongkyu Kim
IPC: H04B17/00 , H04L25/03 , G01R31/317 , H04B1/16
Abstract: A receiver includes a sampler that samples first voltage levels corresponding to a first logical value of data and second voltage levels corresponding to a second logical value of the data, based on a sampling clock. An equalizer receives and adjusts the first and second voltage levels. A clock and data recovery circuit recovers the sampling clock, based on the first and second voltage levels from the equalizer. An eye opening measurement circuit: (1) tracks a first sigma level by a first step unit depending on upper voltage levels greater than a first reference voltage level among the first voltage levels, (2) tracks a second sigma level by a second step unit depending on lower voltage levels less than a second reference voltage level among the second voltage levels, and (3) calculates a difference between the first sigma level and the second sigma level.
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公开(公告)号:US11711245B2
公开(公告)日:2023-07-25
申请号:US17243683
申请日:2021-04-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youngseob Suh , Byungwook Cho , Donghyuk Lim , Junghoon Chun
IPC: H04L25/03
CPC classification number: H04L25/03178 , H04L25/03057
Abstract: An apparatus includes an equalization circuit, an error prediction circuit, a sequence estimation circuit, and a selection circuit. The equalization circuit is configured to generate a first data sequence and a first equalized signal from an input signal received through a channel. The error prediction circuit is configured to predict an error based on the first equalized signal when the error is predicted. When the error is predicted, the sequence estimation circuit is configured to generate a second data sequence from the first data sequence and the predicted error. The selection circuit is configured to output the second data sequence when the predicted error is determined to be an actual error and to otherwise output the first data sequence.
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公开(公告)号:US20220086028A1
公开(公告)日:2022-03-17
申请号:US17243683
申请日:2021-04-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Youngseob Suh , Byungwook Cho , Donghyuk Lim , Junghoon Chun
IPC: H04L25/03
Abstract: An apparatus includes an equalization circuit, an error prediction circuit, a sequence estimation circuit, and a selection circuit. The equalization circuit is configured to generate a first data sequence and a first equalized signal from an input signal received through a channel. The error prediction circuit is configured to predict an error based on the first equalized signal when the error is predicted. When the error is predicted, the sequence estimation circuit is configured to generate a second data sequence from the first data sequence and the predicted error. The selection circuit is configured to output the second data sequence when the predicted error is determined to be an actual error and to otherwise output the first data sequence.
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公开(公告)号:US10728061B2
公开(公告)日:2020-07-28
申请号:US16253589
申请日:2019-01-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: June-Hee Lee , Byungwook Cho , Bongkyu Kim , Gun-Il Kang
IPC: H04L25/03
Abstract: An electronic device includes a reception equalizer that performs, a first equalization on a first signal based on a first coefficient, and one or more second equalizations on one or more second signals based on the first coefficient, the one or more second signals being based on a second coefficient associated with one or more characteristics of a transmission equalizer of the external device, and circuitry that iteratively sends control information generated based on the first coefficient to the external device until a termination condition is satisfied with regard to the first coefficient, the control information causing the second coefficient to be increased or decreased, the iteratively sent control information causing a first absolute value of the first coefficient corresponding to a final equalization of the one or more second equalizations to become smaller than a second absolute value of the first coefficient corresponding to the first equalization.
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