RECEIVER FOR CANCELLING COMMON MODE OFFSET AND CROSSTALK

    公开(公告)号:US20210408970A1

    公开(公告)日:2021-12-30

    申请号:US17227996

    申请日:2021-04-12

    IPC分类号: H03F1/26 H03F3/19

    摘要: A receiver for cancelling common mode offset and crosstalk that amplifies a voltage difference between an input signal and a reference voltage to generate first and second output signals and an internal signal, that generates the same third and fourth output signals as the first and second output signals, generates average voltage levels of the third and fourth output signals by using first and second switching elements and low pass filters to output the average voltage levels as first and second feedback signals, and cancels a common mode offset between the first output signal and the second output signal based on a voltage difference between the first feedback signal and the second feedback signal, and that generates a control signal to cancel crosstalk of the internal signal by turning on/off the first and second switching elements connected to the low pass filters.

    RECEIVERS AND SEMICONDUCTOR MEMORY DEVICES INCLUDING THE SAME

    公开(公告)号:US20240347085A1

    公开(公告)日:2024-10-17

    申请号:US18473837

    申请日:2023-09-25

    IPC分类号: G11C7/20 G11C7/10 G11C7/22

    摘要: A receiver includes a buffer configured to generate an internal data signal by comparing a received data signal with a reference voltage, a decision feedback equalizer configured to generate a sampled signal based on a present value of the internal data signal and on a feedback signal, and configured to provide one of the sampled signal or a first logic level as the feedback signal based on a reset control signal, the sampled signal corresponding to a previous value of the internal data signal, a deserializer configured to generate an output data by deserializing the sampled signal, and a reset control circuit configured to generate the reset control signal based on operating information associated with a write operation of the data signal and configured to provide the reset control signal to the decision feedback equalizer.