公开(公告)号：US20140374827A1

公开(公告)日：2014-12-25

申请号：US14259212

申请日：2014-04-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Chan SUH ,  Chung-Geun KOH ,  Seong-Hoon JEONG ,  Kwan-Heum LEE ,  Hwa-Sung RHEE ,  Gyeom KIM

IPC: H01L29/78 ,  H01L29/06

CPC classification number: H01L29/785 ,  H01L29/66545

Abstract: A semiconductor device includes a fin type active pattern protruding above a device isolation layer, a gate electrode on the device isolation layer and intersecting the fin type active pattern, an elevated source/drain on the fin type active pattern at both sides of the gate electrode, and a fin spacer on a side wall of the fin type active pattern, the fin spacer having a low dielectric constant and being between the device isolation layer and the elevated source/drain.

Abstract translation: 半导体器件包括突出在器件隔离层上方的翅片型有源图案，器件隔离层上的栅电极并与鳍式有源图案相交，栅极电极两侧的翅片型有源图案上的升高的源极/漏极 以及在翅片型有源图案的侧壁上的翅片间隔件，翅片间隔件具有低介电常数并且位于器件隔离层和升高的源极/漏极之间。