IMAGE SENSOR AND IMAGE SENSING DEVICE

    公开(公告)号:US20220150430A1

    公开(公告)日:2022-05-12

    申请号:US17366868

    申请日:2021-07-02

    Abstract: An image sensor comprises an upper chip including pixels; and a lower chip placed below the upper chip, wherein a pixel of the pixels includes an optical conversion element configured that light is incident on the optical conversion element, a first storage gate or a first storage node which is electrically connected to the optical conversion element and configured to store electric charge transferred from the optical conversion element during a first time interval, and a second storage gate or a second storage node which is electrically connected to the optical conversion element and configured to store the electric charge transferred from the optical conversion element during a second time interval different from the first time interval, the pixel is configured to generate a first pixel signal on the basis of the electric charge stored in the first storage gate, the lower chip includes a frame buffer.

    IMAGE SENSOR
    2.
    发明申请

    公开(公告)号:US20220130884A1

    公开(公告)日:2022-04-28

    申请号:US17393855

    申请日:2021-08-04

    Abstract: An image sensor including a variable resistance element is provided. The image sensor comprises first and second chips having first and second connecting structures; and a contact plug connecting the first and second chips. The first chip includes a photoelectric conversion element. The second chip includes a first variable resistance element. The contact plug extends from the first surface of the first semiconductor substrate to connect the first and second connecting structures.

    IMAGE SENSOR AND IMAGE SENSING DEVICE

    公开(公告)号:US20220139991A1

    公开(公告)日:2022-05-05

    申请号:US17368112

    申请日:2021-07-06

    Abstract: An image sensor includes an upper chip having a pixel array connected to a first connecting structure, and a lower chip below the upper chip and having a second connecting structure connected to the first connecting structure and having first and second stacked metal layers with a same thickness, a third metal layer on the second metal layer and thicker than the second metal layer, a fourth metal layer on the third metal layer and thicker than the third metal layer, first through third insulating layers alternating with the first through fourth metal layers, a first memory device with a first MTJ element in at least one of the first and second insulating layers, and a second memory device with a second MTJ element different from the first MTJ element, the second MTJ element being in at least one of the first through third insulating layers.

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