Abstract:
A liquid crystal display includes a light source unit, a first substrate provided on the light source unit, an electrode layer provided on the first substrate, a second substrate separate from the electrode layer, a polarizing plate provided on a surface of the second substrate, a liquid crystal layer disposed between the electrode layer and the second substrate, a reflecting unit provided on a surface of the first substrate; and a wire grid polarizer provided on an opposite surface of the first substrate.
Abstract:
A communication device configured to transmit/receive a radio frequency (RF) signal is provided. The device includes a transceiver including an amplifier device using a multi-loop inter-stage matching (ISM) transformer, and a processor configured to control an operation of the amplifier based on a signal strength during transmission/reception of the RF signal. The transformer is disposed between a first amplifier and a second amplifier and includes a plurality of primary loops and a plurality of secondary loops, each primary loop includes an inductor component having a different size and a different Q-factor and each secondary loop includes an inductor component having a different size and a different Q-factor. The processor adjusts an attenuation level of the transformer by controlling a switching connection to the first amplifier and the second amplifier for one primary loop among the plurality of primary loops and one secondary loop among the plurality of secondary loops.
Abstract:
The present disclosure relates to a 5G communication system or a 6G communication system for supporting higher data rates beyond a 4G communication system such as long term evolution (LTE). A low noise amplifier (LNA) in a wireless communication system according to an embodiment of the disclosure includes a first transistor and a first feedback transformer in which a gate of the first transistor is connected to a primary coil of the first feedback transformer and a source of the first transistor is connected to a secondary coil of the first feedback transformer. The first feedback transformer is configured to implement positive feedback to maintain an in-phase signal at the gate of the first transistor and the source of the first transistor.