公开(公告)号：US20240321713A1

公开(公告)日：2024-09-26

申请号：US18607907

申请日：2024-03-18

申请人： Samsung Electronics Co., Ltd.

发明人： Yoonyoung JEON ,  Dongheon KANG

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L23/00

CPC分类号： H01L23/49838 ,  H01L23/3128 ,  H01L23/49811 ,  H01L23/49822 ,  H01L24/16 ,  H01L2224/16225

摘要： A semiconductor package may include a first redistribution structure, a semiconductor chip on the first redistribution structure, conductive posts spaced apart from the semiconductor chip and on the first redistribution structure, a molding layer on the first redistribution structure and surrounding the semiconductor chip and the conductive posts, and a second redistribution structure on the molding layer. The second redistribution structure may include a second redistribution pattern, a pad structure connected to the second redistribution pattern, and a second redistribution insulating layer. The second redistribution insulating layer may include a first insulating layer surrounding the second redistribution pattern and a second insulating layer surrounding at least a portion of the pad structure. The pad structure may include a second pad layer on a first pad layer. Surfaces of the first and second pad layers in contact with the second insulating layer may be concavo-convex.

公开(公告)号：US20220399260A1

公开(公告)日：2022-12-15

申请号：US17672092

申请日：2022-02-15

申请人： Samsung Electronics Co., Ltd.

发明人： Yoonyoung JEON ,  Joonseok OH ,  Youngmin KIM ,  Dongheon KANG ,  Changbo LEE

IPC分类号： H01L23/498 ,  H01L23/00 ,  H01L25/10 ,  H01L25/065

摘要： A semiconductor package may include at least one first rewiring structure, the at least one first rewiring structure including a plurality of first insulating layers vertically stacked and a plurality of first rewiring patterns included in the plurality of first insulating layers, at least one semiconductor chip on the at least one first rewiring structure, and at least one molding layer covering the at least one semiconductor chip, wherein each of the plurality of first rewiring patterns includes, a first conductive pattern, the first conductive pattern including a curved upper surface, and a first seed pattern covering a side surface and a lower surface of the first conductive pattern, and each of the first seed patterns of the plurality of first rewiring patterns having a same shape.