公开(公告)号：US20170221771A1

公开(公告)日：2017-08-03

申请号：US15489782

申请日：2017-04-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNG-GUN YOU ,  EUNG-GWAN KIM ,  JEONG-YUN LEE

IPC: H01L21/8238 ,  H01L21/02 ,  H01L27/092 ,  H01L29/78 ,  H01L29/161 ,  H01L29/16 ,  H01L29/165 ,  H01L29/08 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L21/823828 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L21/823878 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

Abstract: Spaced apart first and second fins are formed on a substrate. An isolation layer is formed on the substrate between the first and second fins. A gate electrode is formed on the isolation layer and crossing the first and second fins. Source/drain regions are formed on the first and second fins adjacent the gate electrode. After forming the source/drain regions, a portion of the gate electrode between the first and second fins is removed to expose the isolation layer. The source/drain regions may be formed by epitaxial growth.

公开(公告)号：US20160020150A1

公开(公告)日：2016-01-21

申请号：US14803893

申请日：2015-07-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： JUNG-GUN YOU ,  EUNG-GWAN KIM ,  JEONG-YUN LEE

IPC: H01L21/8238 ,  H01L21/3213 ,  H01L29/165 ,  H01L21/02 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L21/823828 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823864 ,  H01L21/823878 ,  H01L27/0924 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

Abstract: Spaced apart first and second fins are formed on a substrate. An isolation layer is formed on the substrate between the first and second fins. A gate electrode is formed on the isolation layer and crossing the first and second fins. Source/drain regions are formed on the first and second fins adjacent the gate electrode. After forming the source/drain regions, a portion of the gate electrode between the first and second fins is removed to expose the isolation layer. The source/drain regions may be formed by epitaxial growth.

Abstract translation: 隔开的第一和第二散热片形成在基板上。 在第一和第二鳍片之间的衬底上形成隔离层。 栅电极形成在隔离层上并与第一和第二鳍交叉。 源极/漏极区域形成在与栅电极相邻的第一和第二鳍片上。 在形成源极/漏极区域之后，去除第一和第二鳍片之间的栅电极的一部分以暴露隔离层。 源/漏区可以通过外延生长形成。