公开(公告)号：US20240120286A1

公开(公告)日：2024-04-11

申请号：US18371152

申请日：2023-09-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeonseok LEE ,  Eungkyu KIM ,  Jongyoun KIM ,  Hyeonjeong HWANG

IPC: H01L23/544 ,  H01L23/31 ,  H01L23/498 ,  H01L25/10

CPC classification number: H01L23/544 ,  H01L23/3128 ,  H01L23/49822 ,  H01L23/49833 ,  H01L25/105 ,  H01L24/16 ,  H01L2223/54426 ,  H01L2224/16227

Abstract: Provided is a semiconductor package including a lower redistribution structure, an internal semiconductor chip on an upper surface of the lower redistribution structure, an upper redistribution structure electrically connected to the lower redistribution structure through a conductive post, and a molding layer between the upper redistribution structure and the lower redistribution structure, the molding layer being adjacent to the internal semiconductor chip, wherein the upper redistribution structure includes an insulating layer including a redistribution pattern and a first material configured to transmit light, and a fiducial mark formed of the first material, and a lower surface of the fiducial mark is in contact with an upper surface of the molding layer.

公开(公告)号：US20220415835A1

公开(公告)日：2022-12-29

申请号：US17742852

申请日：2022-05-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Minjun BAE ,  Seokhyun LEE ,  Eungkyu KIM

IPC: H01L23/00

Abstract: Disclosed are semiconductor packages and their fabricating methods. A semiconductor package includes a semiconductor chip on a redistribution substrate. The redistribution substrate includes a base dielectric layer and upper coupling pads in the base dielectric layer. Top surfaces of the upper coupling pads are coplanar with a top surface of the base dielectric layer. The semiconductor chip includes a redistribution dielectric layer and redistribution chip pads in the redistribution dielectric layer. Top surfaces of the redistribution chip pads are coplanar with a top surface of the redistribution dielectric layer. The top surface of the redistribution dielectric layer is bonded to the top surface of the base dielectric layer. The redistribution chip pads are bonded to the upper coupling pads. The redistribution chip pads and the upper coupling pads include a same metallic material. The redistribution dielectric layer and the base dielectric layer include a photosensitive polymer layer.

公开(公告)号：US20230046098A1

公开(公告)日：2023-02-16

申请号：US17680815

申请日：2022-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jongyoun KIM ,  Eungkyu KIM ,  Inhyung SONG ,  Hyeonseok LEE

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31 ,  H01L23/34

Abstract: A semiconductor package includes a package substrate, a semiconductor stack on the package substrate, a passive device on the package substrate and spaced apart from the semiconductor stack, and a stiffener on the package substrate and extending around an outer side of the semiconductor stack. The stiffener includes a first step surface extends over the passive device. A width of a bottom surface of the stiffener is smaller than a width of a top surface of the stiffener.