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公开(公告)号：US11495320B2
公开(公告)日：2022-11-08
申请号：US17169643
申请日：2021-02-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Heejong Kim , Gunbae Kim
Abstract: A storage device includes a power supply circuit that receives a power disable signal from a host device and provides a first internal voltage and a second internal voltage, a non-volatile memory including a memory device, and a storage controller that controls the non-volatile memory and includes a processor that performs a data recovery operation on data stored in the memory device and a host interface that communicates with the host device. When the power disable signal is activated at a power off time, the storage controller is powered off, the power supply circuit interrupts the first internal voltage and the second internal voltage during a reference time following the power off time, and provides the first internal voltage to the processor after the reference time has elapsed following the power off time.
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2.发明公开公开(公告)号：US20240273013A1
公开(公告)日：2024-08-15
申请号：US18428332
申请日：2024-01-31
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sangho Yi , Jihoon Kim , Chaehwan Yang , Jonghun Jeong , Gunbae Kim
IPC: G06F12/02
CPC classification number: G06F12/0223
Abstract: A computational storage system according to an aspect of the inventive concept includes a storage device including a storage controller, a buffer memory, and a non-volatile memory, a computing device configured to process data in response to a data processing request received from an external device and to generate first dump data in response to a first dump request received from the external device, and a volatile memory configured to store data used for data processing of the computing device, wherein the storage device is configured to store the first dump data in the nonvolatile memory in response to a storage request of the first dump data using a metadata access protocol received from the computing device.
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