Fine patterning methods and methods of fabricating semiconductor devices using the same
    1.
    发明授权
    Fine patterning methods and methods of fabricating semiconductor devices using the same 有权
    精细构图方法和使用其制造半导体器件的方法

    公开(公告)号:US09553027B2

    公开(公告)日:2017-01-24

    申请号:US15141860

    申请日:2016-04-29

    Abstract: A fine-patterning method includes forming a mask layer with lower and upper mask layers on an underlying layer, forming a pair of sacrificial patterns on the mask layer, forming a connection spacer between the sacrificial patterns and first spacers that are spaced apart from each other with the pair of sacrificial patterns interposed therebetween and covering side surfaces of the sacrificial patterns, etching the upper mask layer using the first spacers and the connection spacer as an etch mask to form upper mask patterns, forming second spacers to cover side surfaces of the upper mask patterns, etching the lower mask layer using the second spacers as an etch mask to form lower mask patterns, and etching the underlying layer using the lower mask patterns as an etch mask.

    Abstract translation: 精细图案化方法包括在下层上形成具有下掩模层和上掩模层的掩模层,在掩模层上形成一对牺牲图案,在牺牲图案和彼此间隔开的第一间隔物之间​​形成连接间隔物 其中一对牺牲图案插入在其间并覆盖牺牲图案的侧表面,使用第一间隔件和连接间隔件蚀刻上掩模层作为蚀刻掩模以形成上掩模图案,形成第二间隔件以覆盖上表面的侧表面 使用第二间隔物蚀刻下掩模层作为蚀刻掩模以形成下掩模图案,并使用下掩模图案作为蚀刻掩模蚀刻下层。

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