SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    2.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 有权
    半导体器件及其制造方法

    公开(公告)号:US20140035048A1

    公开(公告)日:2014-02-06

    申请号:US13949289

    申请日:2013-07-24

    Abstract: Provided are a semiconductor device and a method of fabricating the same. The device may include a transistor on a substrate comprising a gate insulating pattern, a gate electrode and an impurity region, a shared contact plug electrically connected to the gate electrode and the impurity region, and an etch-stop layer between side surfaces of the gate electrode and the shared contact. The shared contact plug may include a first conductive pattern electrically connected to the first impurity region and a second conductive pattern electrically connected to the gate electrode, and a top surface of the first conductive pattern may be higher than a top surface of the gate electrode.

    Abstract translation: 提供半导体器件及其制造方法。 器件可以包括在包括栅极绝缘图案,栅极电极和杂质区域的衬底上的晶体管,电连接到栅极电极和杂质区域的共用接触插塞以及栅极侧表面之间的蚀刻停止层 电极和共用触点。 共享接触插头可以包括电连接到第一杂质区域的第一导电图案和电连接到栅电极的第二导电图案,并且第一导电图案的顶表面可以高于栅电极的顶表面。

    Semiconductor device and method of fabricating the same
    3.
    发明授权
    Semiconductor device and method of fabricating the same 有权
    半导体装置及其制造方法

    公开(公告)号:US09190404B2

    公开(公告)日:2015-11-17

    申请号:US13949289

    申请日:2013-07-24

    Abstract: Provided are a semiconductor device and a method of fabricating the same. The device may include a transistor on a substrate comprising a gate insulating pattern, a gate electrode and an impurity region, a shared contact plug electrically connected to the gate electrode and the impurity region, and an etch-stop layer between side surfaces of the gate electrode and the shared contact. The shared contact plug may include a first conductive pattern electrically connected to the first impurity region and a second conductive pattern electrically connected to the gate electrode, and a top surface of the first conductive pattern may be higher than a top surface of the gate electrode.

    Abstract translation: 提供半导体器件及其制造方法。 器件可以包括在包括栅极绝缘图案,栅极电极和杂质区域的衬底上的晶体管,电连接到栅极电极和杂质区域的共用接触插塞以及栅极侧表面之间的蚀刻停止层 电极和共用触点。 共享接触插头可以包括电连接到第一杂质区域的第一导电图案和电连接到栅电极的第二导电图案,并且第一导电图案的顶表面可以高于栅电极的顶表面。

    System and method for providing conversational contents

    公开(公告)号:US10911378B2

    公开(公告)日:2021-02-02

    申请号:US16270954

    申请日:2019-02-08

    Abstract: An electronic device may be configured to receive a message for a second external electronic device, from a first external electronic device through a first network associated with the first external electronic device among a plurality of rich communication suite (RCS) networks using a communication circuit, to determine whether to transmit the message based on a profile of the second external electronic device including at least one throttling metric for the first network among the plurality of RCS networks stored in a memory and a network state of the first network, and to convert the message based on a protocol of a second network and to transmit the converted message to the second external electronic device through the second network based on determining to transmit the message.

    Fine patterning methods and methods of fabricating semiconductor devices using the same
    5.
    发明授权
    Fine patterning methods and methods of fabricating semiconductor devices using the same 有权
    精细构图方法和使用其制造半导体器件的方法

    公开(公告)号:US09553027B2

    公开(公告)日:2017-01-24

    申请号:US15141860

    申请日:2016-04-29

    Abstract: A fine-patterning method includes forming a mask layer with lower and upper mask layers on an underlying layer, forming a pair of sacrificial patterns on the mask layer, forming a connection spacer between the sacrificial patterns and first spacers that are spaced apart from each other with the pair of sacrificial patterns interposed therebetween and covering side surfaces of the sacrificial patterns, etching the upper mask layer using the first spacers and the connection spacer as an etch mask to form upper mask patterns, forming second spacers to cover side surfaces of the upper mask patterns, etching the lower mask layer using the second spacers as an etch mask to form lower mask patterns, and etching the underlying layer using the lower mask patterns as an etch mask.

    Abstract translation: 精细图案化方法包括在下层上形成具有下掩模层和上掩模层的掩模层,在掩模层上形成一对牺牲图案,在牺牲图案和彼此间隔开的第一间隔物之间​​形成连接间隔物 其中一对牺牲图案插入在其间并覆盖牺牲图案的侧表面,使用第一间隔件和连接间隔件蚀刻上掩模层作为蚀刻掩模以形成上掩模图案,形成第二间隔件以覆盖上表面的侧表面 使用第二间隔物蚀刻下掩模层作为蚀刻掩模以形成下掩模图案,并使用下掩模图案作为蚀刻掩模蚀刻下层。

    SYSTEM AND METHOD FOR PROVIDING CONVERSATIONAL CONTENTS

    公开(公告)号:US20190253368A1

    公开(公告)日:2019-08-15

    申请号:US16270954

    申请日:2019-02-08

    CPC classification number: H04L51/02 H04L51/06

    Abstract: An electronic device may be configured to receive a message for a second external electronic device, from a first external electronic device through a first network associated with the first external electronic device among a plurality of rich communication suite (RCS) networks using a communication circuit, to determine whether to transmit the message based on a profile of the second external electronic device including at least one throttling metric for the first network among the plurality of RCS networks stored in a memory and a network state of the first network, and to convert the message based on a protocol of a second network and to transmit the converted message to the second external electronic device through the second network based on determining to transmit the message.

    Semiconductor device, electronic device including the same and manufacturing methods thereof
    9.
    发明授权
    Semiconductor device, electronic device including the same and manufacturing methods thereof 有权
    半导体装置,包括该装置的电子装置及其制造方法

    公开(公告)号:US09312181B2

    公开(公告)日:2016-04-12

    申请号:US14531987

    申请日:2014-11-03

    Abstract: The disclosure provides semiconductor devices and methods of manufacturing the same. The method includes etching a substrate using a first mask pattern formed on the substrate to form a trench, forming a preliminary device isolation pattern filling the trench and including first and second regions having first thicknesses, forming a second mask pattern on the first region, etching an upper portion of the second region and a portion of the first mask pattern, which are exposed by the second mask pattern, to form a second region having a second thickness smaller than the first thickness, removing the first and second mask patterns, and etching upper portions of the first region and the second region having the second thickness to form a device isolation pattern defining preliminary fin-type active patterns. An electronic device including a semiconductor device and a manufacturing method thereof are also disclosed.

    Abstract translation: 本公开提供半导体器件及其制造方法。 该方法包括使用形成在衬底上的第一掩模图案来蚀刻衬底以形成沟槽,形成填充沟槽的初步器件隔离图案,并且包括具有第一厚度的第一和第二区域,在第一区域上形成第二掩模图案,蚀刻 第二区域的上部和第一掩模图案的一部分被第二掩模图案曝光,以形成具有小于第一厚度的第二厚度的第二区域,去除第一和第二掩模图案,以及蚀刻 所述第一区域的上部和所述第二区域具有第二厚度,以形成限定预备鳍型活性图案的器件隔离图案。 还公开了一种包括半导体器件及其制造方法的电子器件。

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