公开(公告)号：US11107826B2

公开(公告)日：2021-08-31

申请号：US16565579

申请日：2019-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hae-min Lee ,  Kwang-soo Kim ,  Sun-il Shim

IPC: H01L27/1157 ,  G11C5/06 ,  H01L23/522 ,  H01L27/11582 ,  H01L27/11524 ,  H01L27/11556

Abstract: A semiconductor memory device includes gate electrodes arranged on a substrate to be spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, an upper insulation layer arranged on an uppermost gate electrode, channel structures penetrating through the upper insulation layer, and the gate electrodes in the first direction, and string selection line cut insulation layers horizontally separating the upper insulation layer and the uppermost gate electrode. Each of the string selection line cut insulation layers includes a protrusion protruding toward the uppermost gate electrode and positioning on the same level as the first gate electrode.