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    VERTICAL NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    4.
    发明申请
    VERTICAL NON-VOLATILE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开
    垂直非易失性存储器件及其制造方法

    公开(公告)号：US20130279233A1

    公开(公告)日：2013-10-24

    申请号：US13921554

    申请日：2013-06-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sung-min Hwang ,  Han-soo Kim ,  Won-seok CHO ,  Jae-hoon Jang ,  Sun-il Shim ,  Jae-hun Jeong ,  Ki-hyun Kim

    IPC: G11C5/06

    CPC classification number: G11C5/06 ,  H01L23/5283 ,  H01L27/112 ,  H01L27/115 ,  H01L27/11517

    Abstract: A vertical non-volatile memory device is structured/fabricated to include a substrate, groups of memory cell strings each having a plurality of memory transistors distributed vertically so that the memory throughout multiple layers on the substrate, integrated word lines coupled to sets of the memory transistors, respectively, and stacks of word select lines. The memory transistors of each set are those transistors, of one group of the memory cell strings, which are disposed in the same layer above the substrate. The word select lines are respectively connected to the integrated word lines.

    Abstract translation: 垂直非易失性存储器件被构造/制造成包括衬底，每组具有多个垂直分布的存储器晶体管的存储单元串组，使得衬底上多层的存储器，与存储器组合耦合的集成字线 晶体管和字选择线的堆叠。 每组的存储晶体管是一组存储单元串的晶体管，它们设置在衬底上方的相同层中。 字选择线分别连接到集成字线。

    Semiconductor memory device
    5.
    发明授权
    Semiconductor memory device 有权

    公开(公告)号：US11107826B2

    公开(公告)日：2021-08-31

    申请号：US16565579

    申请日：2019-09-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hae-min Lee ,  Kwang-soo Kim ,  Sun-il Shim

    IPC: H01L27/1157 ,  G11C5/06 ,  H01L23/522 ,  H01L27/11582 ,  H01L27/11524 ,  H01L27/11556

    Abstract: A semiconductor memory device includes gate electrodes arranged on a substrate to be spaced apart from each other in a first direction perpendicular to an upper surface of the substrate, an upper insulation layer arranged on an uppermost gate electrode, channel structures penetrating through the upper insulation layer, and the gate electrodes in the first direction, and string selection line cut insulation layers horizontally separating the upper insulation layer and the uppermost gate electrode. Each of the string selection line cut insulation layers includes a protrusion protruding toward the uppermost gate electrode and positioning on the same level as the first gate electrode.

    THREE-DIMENSIONAL MICROELECTRONIC DEVICES INCLUDING HORIZONTAL AND VERTICAL PATTERNS
    6.
    发明申请
    THREE-DIMENSIONAL MICROELECTRONIC DEVICES INCLUDING HORIZONTAL AND VERTICAL PATTERNS 有权
    包括水平和垂直图案的三维微电子器件

    公开(公告)号：US20130256775A1

    公开(公告)日：2013-10-03

    申请号：US13901205

    申请日：2013-05-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Sun-il Shim ,  Sung-Hoi Hur ,  Jin-Ho Kim ,  Su-Youn Yi

    IPC: H01L27/115

    CPC classification number: H01L27/1158 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11568 ,  H01L27/11578 ,  H01L29/66825 ,  H01L29/66833 ,  H01L29/7881 ,  H01L29/792 ,  H01L29/7926

    Abstract: A vertical NAND flash memory device includes a substrate having a face and a string of serially connected flash memory cells on the substrate. A first flash memory cell is adjacent the face, and a last flash memory cell is remote from the face. The flash memory cells include repeating layer patterns that are stacked on the face, and a pillar that extends through the series of repeating layer patterns. The pillar includes at least one oblique wall. At least two of the series of repeating layer patterns in the string are of different thicknesses. Other vertical microelectronic devices and related fabrication methods are also described.

    Abstract translation: 垂直NAND闪速存储器件包括在衬底上具有面和串联的闪存单元串的衬底。 第一闪存单元与面相邻，并且最后的闪存单元远离面。 闪存单元包括堆叠在表面上的重复层图案和延伸穿过一系列重复层图案的柱。 支柱包括至少一个斜壁。 串中重复层图案的系列中的至少两个具有不同的厚度。 还描述了其它垂直微电子器件和相关的制造方法。

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