公开(公告)号：US11600638B2

公开(公告)日：2023-03-07

申请号：US17136851

申请日：2020-12-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sanghoon Lee ,  Sunggil Kim ,  Seulye Kim ,  Hwaeon Shin ,  Joonsuk Lee ,  Hyeeun Hong

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L21/02 ,  H01L29/66 ,  H01L21/3213 ,  H01L21/768 ,  H01L29/10 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L21/28

Abstract: Disclosed are three-dimensional semiconductor memory devices and methods of fabricating the same. The method comprises sequentially forming a sacrificial pattern and a source conductive layer on a substrate, forming a mold structure including a plurality of insulating layers and a plurality of sacrificial layers on the source conductive layer; forming a plurality of vertical structures penetrating the mold structure, forming a trench penetrating the mold structure, forming a sacrificial spacer on a sidewall of the trench, removing the sacrificial pattern to form a horizontal recess region; removing the sacrificial spacer, and forming a source conductive pattern filling the horizontal recess region.

公开(公告)号：US10903231B2

公开(公告)日：2021-01-26

申请号：US16217696

申请日：2018-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sanghoon Lee ,  Sunggil Kim ,  Seulye Kim ,  Hwaeon Shin ,  Joonsuk Lee ,  Hyeeun Hong

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L21/02 ,  H01L29/66 ,  H01L21/3213 ,  H01L21/768 ,  H01L29/10 ,  H01L27/11556 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L21/28

Abstract: Disclosed are three-dimensional semiconductor memory devices and methods of fabricating the same. The method includes sequentially forming a sacrificial pattern and a source conductive layer on a substrate, forming a mold structure including a plurality of insulating layers and a plurality of sacrificial layers on the source conductive layer; forming a plurality of vertical structures that penetrate the mold structure, forming a trench that penetrates the mold structure, forming a sacrificial spacer on a sidewall of the trench, removing the sacrificial pattern to form a horizontal recess region; removing the sacrificial spacer, and forming a source conductive pattern that fills the horizontal recess region.