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1.
公开(公告)号:US20240160397A1
公开(公告)日:2024-05-16
申请号:US18391083
申请日:2023-12-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Deukgeun AHN , Jaehyang Lee , Hyeokjun Choi
CPC classification number: G06F3/1446 , G09G3/32 , G09G2300/026 , G09G2310/0213 , G09G2330/021 , G09G2360/12
Abstract: A modular display apparatus is disclosed. The modular display apparatus includes a plurality of display modules, and a controller configured to control the plurality of display modules, and the plurality of display modules include a plurality of scan groups, respectively, the controller is configured to transmit an image signal corresponding to the respective display modules based on an image frame, and the respective scan groups included in a first display module from among the plurality of display modules includes a plurality of scan lines arranged in one direction, a plurality of data lines arranged in a direction perpendicular to the plurality of scan lines, light emitting diodes generated at a cross area of the scan lines and the data lines, and at least one driver integrated circuit.
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公开(公告)号:US11521672B2
公开(公告)日:2022-12-06
申请号:US17230519
申请日:2021-04-14
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyeokjun Choi , Jindo Byun , Younghoon Son , Youngdon Choi , Junghwan Choi
IPC: G11C7/22 , G11C11/4091 , G11C11/406 , G11C11/4076 , G11C11/408 , G11C11/4096
Abstract: A semiconductor device includes: a multi-level receiver including N sense amplifiers and a decoder decoding an output of the N sense amplifiers, each of the N sense amplifiers receiving a multi-level signal having M levels and a reference signal (where M is a natural number, higher than 2, and where N is a natural number, lower than M); a clock buffer receiving a reference clock signal; and a clock controller generating N clock signals using the reference clock signal, inputting the N clock signals to the N sense amplifiers, respectively, and individually determining a phase of each of the N clock signals using the output of the N sense amplifiers.
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