公开(公告)号：US20240258393A1

公开(公告)日：2024-08-01

申请号：US18544767

申请日：2023-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojung NOH ,  Sungnam LYU ,  Byounghoon LEE ,  Jangeun LEE ,  Eulji JEONG

IPC: H01L29/423 ,  H10B12/00

CPC classification number: H01L29/42372 ,  H01L29/42364 ,  H10B12/315 ,  H01L29/4236

Abstract: A gate structure includes a first conductive pattern including a first metal or a first metal compound and being doped with a second metal or silicon; a second conductive pattern on the first conductive pattern, the second conductive pattern including a third metal; and a gate insulation pattern covering a lower surface and a sidewall of the first conductive pattern and a sidewall of the second conductive pattern; wherein a work function of the second metal is smaller than a work function of the first metal and is smaller than a work function of the first metal compound.

公开(公告)号：US20240407152A1

公开(公告)日：2024-12-05

申请号：US18642174

申请日：2024-04-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eulji JEONG ,  Sukhoon KIM ,  Hyojung NOH ,  Sungnam LYU ,  Byounghoon LEE

IPC: H10B12/00

Abstract: A gate structure comprising: a first conductive pattern; a first seed pattern on a lower surface and a first portion of a sidewall of the first conductive pattern, wherein the first seed pattern includes a first material, and the first conductive pattern includes a second material that is different from the first material; and a gate insulation pattern that is in contact with a second portion of the sidewall of the first conductive pattern and the first seed pattern, wherein the first material has a first work function, and the second material has a second work function, and wherein the first work function is lower than the second work function.

公开(公告)号：US20230178439A1

公开(公告)日：2023-06-08

申请号：US17950512

申请日：2022-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jangeun LEE ,  Hyojung NOH ,  Minwoo SONG ,  Yongho HA ,  Jeongwon HWANG

IPC: H01L21/8234 ,  H01L27/108 ,  H01L29/06

CPC classification number: H01L21/823493 ,  H01L21/823462 ,  H01L27/10823 ,  H01L27/10876 ,  H01L29/0623

Abstract: A method of manufacturing a semiconductor device is provided. The method of manufacturing a semiconductor device includes an forming a trench in a substrate, forming a gate dielectric layer on the trench, forming a gate layer on the gate dielectric layer, and annealing the gate dielectric layer and the gate layer, wherein, after the first annealing operation, the gate layer includes a molybdenum-tantalum alloy.