公开(公告)号：US20040100853A1

公开(公告)日：2004-05-27

申请号：US10303409

申请日：2002-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Hyun Choi ,  Jae-Young Lee ,  Hyong-Ryol Hwang

IPC: G11C008/00

CPC classification number: G11C8/18 ,  G11C8/06

Abstract: The present invention discloses an address buffer and a semiconductor memory device having the address buffer. The address buffer comprises a first buffer for latching a signal in response to a first control signal in a normal operation mode in the semiconductor memory device and generating a buffered signal by buffering the latched signal in response to a second control signal, and a second buffer for maintaining a mode-setting signal in a reset status in the normal operation mode and for outputting the mode-setting signal by using the latched signal in response to the first control signal and a mode-setting command in a mode-setting operation mode. Accordingly, the mode-setting signal is generated only in the mode-setting operation mode, thereby reducing undesirable current consumption.

Abstract translation: 本发明公开了一种地址缓冲器和具有地址缓冲器的半导体存储器件。 地址缓冲器包括：第一缓冲器，用于响应于在半导体存储器件中的正常操作模式中的第一控制信号来锁存信号，并且通过响应于第二控制信号缓冲锁存信号并产生缓冲信号;以及第二缓冲器 用于在正常操作模式中将模式设置信号保持在复位状态，并且在模式设置操作模式中响应于第一控制信号和模式设置命令，通过使用锁存信号来输出模式设置信号。 因此，仅在模式设定操作模式下产生模式设定信号，从而减少不期望的电流消耗。

公开(公告)号：US20020191466A1

公开(公告)日：2002-12-19

申请号：US09925812

申请日：2001-08-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyong-Ryol Hwang ,  Jong-Hyun Choi ,  Hyun-Soon Jang

IPC: G11C007/00

CPC classification number: G11C11/40622 ,  G11C7/1018 ,  G11C11/406 ,  G11C11/4087

Abstract: Systems and methods for performing a PASR (partial array self-refresh) operation wherein a refresh operation for recharging stored data is performed on a portion (e.g., nullnull, null, or {fraction (1/16)}) of one or more selected memory banks comprising a cell array in a semiconductor memory device. In one aspect, a PASR operation is performed by (1) controlling the generation of row addresses by a row address counter during a self-refresh operation and (2) controlling a self-refresh cycle generating circuit to adjust the self-refresh cycle output therefrom. The self-refresh cycle is adjusted in a manner that provides a reduction in the current dissipation during the PASR operation. In another aspect, a PASR operation is performed by controlling one or more row addresses corresponding to a partial cell array during a self-refresh operation, whereby a reduction in a self-refresh current dissipation is achieved by blocking the activation of a non-used block of a memory bank.

Abstract translation: 用于执行PASR（部分阵列自刷新）操作的系统和方法，其中对一个或多个所选择的存储体的部分（例如，1 / 2,1 / 8或1/16）执行用于对存储数据进行再充电的刷新操作，所述部分包括 半导体存储器件中的单元阵列。 一方面，通过以下操作来执行PASR操作：（1）在自刷新操作期间通过行地址计数器控制行地址的生成，以及（2）控制自刷新周期发生电路以调整自刷新周期输出 由此。 调整自刷新周期，从而在PASR操作期间降低电流消耗。 在另一方面，通过在自刷新操作期间控制对应于部分单元阵列的一个或多个行地址来执行PASR操作，由此通过阻止未使用的激活来实现自刷新电流消耗的减少 一块记忆库。