Abstract:
The present invention discloses an address buffer and a semiconductor memory device having the address buffer. The address buffer comprises a first buffer for latching a signal in response to a first control signal in a normal operation mode in the semiconductor memory device and generating a buffered signal by buffering the latched signal in response to a second control signal, and a second buffer for maintaining a mode-setting signal in a reset status in the normal operation mode and for outputting the mode-setting signal by using the latched signal in response to the first control signal and a mode-setting command in a mode-setting operation mode. Accordingly, the mode-setting signal is generated only in the mode-setting operation mode, thereby reducing undesirable current consumption.
Abstract:
In a liquid crystal display apparatus, a lower substrate has a transmissive electrode formed in a transmissive area of a first substrate and a reflective electrode formed in a reflective area of the first substrate. An upper substrate has a second substrate, a first insulating layer formed on the second substrate corresponding to the transmissive area, a common electrode formed on the first insulating layer and the second substrate corresponding to the reflective area, and a second insulating layer formed on the common electrode corresponding to the reflective area. Accordingly, the liquid crystal display apparatus may have a uniform cell gap, thereby improving a reflectance and a transmittance thereof.
Abstract:
A bit line sense amplifier is provided. The bit line sense amplifier includes a first sense amplifier block in which a plurality of first sense amplifiers for sensing and amplifying data of a bit line or a complementary bit line are laid out, and first drivers, which are arranged outside the plurality of first sense amplifiers, for pulling down the bit line or the complementary bit line to a first voltage level. The bit line sense amplifier further includes a second sense amplifier block with a plurality of second sense amplifiers and second drivers for pulling up the bit line or the complementary bit line to a second voltage level. By arranging the drivers outside the bit sense amplifiers, effects caused by variation in critical dimensions (CDs) of gates are minimized and the entire area of the bit line sense amplifier is reduced.
Abstract:
In an LCD apparatus, a reflecting plate, which is formed on a pixel electrode connected to a switching device formed on an array substrate, defines a reflecting area from which a natural light is reflected and a transmitting area through which an artificial light is transmitted. The reflecting plate is partially extended to and overlapped with the transmitting area depending upon a rubbing direction of the array substrate. Thus, the reflective-transmissive type LCD apparatus may prevent occurrence of the afterimage, and may enhance a contrast ratio thereof when operated in a transmissive mode.
Abstract:
A liquid crystal display, in accordance with the present invention, includes a first substrate having a thin film transistor and a first electrode formed thereon. The first electrode is electrically connected to the thin film transistor. A first insulating layer is formed on the first substrate including the thin film transistor and the first electrode and a window is formed in the first insulating layer, the window exposing a predetermined region of the first electrode. A second electrode is provided on the first insulating layer and electrically connected to the first electrode. A second substrate includes a third electrode formed thereon. A first gap is formed between a surface of the third electrode and a surface of the predetermined region of the first electrode, and a second gap is formed between the surface of the third electrode and a surface of the second electrode. A liquid crystal layer is interposed between the first gap and the second gap. Other embodiments are included as well as methods for forming the liquid crystal display of the present invention.