公开(公告)号：US20190157336A1

公开(公告)日：2019-05-23

申请号：US16171841

申请日：2018-10-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Hun KIM ,  Sang-Su PARK ,  Chang-Hwa KIM ,  Hyung-Yong KIM ,  Beom-Suk LEE ,  Man-Geun CHO ,  Jae-Sung HUR

IPC: H01L27/146 ,  G02B27/10 ,  G02B27/09 ,  H01L25/16

Abstract: An image sensor includes a plurality of photo diodes disposed at a semiconductor substrate, and a splitter disposed on the photo diodes. The splitter splits an incident light depending on a wavelength so that split light of different colors enters different photo diodes, respectively. The splitter includes a first pattern structure having a cross-sectional structure in which a plurality of refractive layer patterns are deposited in a lateral direction.

公开(公告)号：US20140110757A1

公开(公告)日：2014-04-24

申请号：US14138721

申请日：2013-12-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Wook LEE ,  Myeong-Cheol KIM ,  Sang-Min LEE ,  Young-Ju PARK ,  Hyung-Yong KIM ,  Myung-Hoon JUNG

IPC: H01L29/66 ,  H01L29/78 ,  H01L21/265

CPC classification number: H01L29/7848 ,  H01L21/26506 ,  H01L21/30608 ,  H01L21/3065 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/11 ,  H01L29/66636 ,  H01L29/78

Abstract: A fabricating method of a semiconductor device includes providing a substrate having a first region and a second region, forming a plurality of first gates in the first region of the substrate, such that the first gates are spaced apart from each other at a first pitch, forming a plurality of second gates in the second region of the substrate, such that the second gates are spaced apart from each other at a second pitch different from the first pitch, implanting an etch rate adjusting dopant into the second region to form implanted regions, while blocking the first region, forming a first trench by etching the first region between the plurality of first gates, and forming a second trench by etching the second region between the plurality of second gates.

Abstract translation: 半导体器件的制造方法包括提供具有第一区域和第二区域的衬底，在衬底的第一区域中形成多个第一栅极，使得第一栅极以第一间距相互间隔开， 在所述衬底的所述第二区域中形成多个第二栅极，使得所述第二栅极以不同于所述第一间距的第二间距彼此间隔开，将蚀刻速率调节掺杂剂注入所述第二区域以形成注入区域， 同时阻挡第一区域，通过蚀刻多个第一栅极之间的第一区域形成第一沟槽，并且通过蚀刻多个第二栅极之间的第二区域形成第二沟槽。

公开(公告)号：US20150137261A1

公开(公告)日：2015-05-21

申请号：US14602716

申请日：2015-01-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Wook LEE ,  Myeong-Cheol KIM ,  Sang-Min LEE ,  Young-Ju PARK ,  Hyung-Yong KIM ,  Myung-Hoon JUNG

IPC: H01L29/78 ,  H01L27/11

CPC classification number: H01L29/7848 ,  H01L21/26506 ,  H01L21/30608 ,  H01L21/3065 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/11 ,  H01L29/66636 ,  H01L29/78

Abstract: A fabricating method of a semiconductor device includes providing a substrate having a first region and a second region, forming a plurality of first gates in the first region of the substrate, such that the first gates are spaced apart from each other at a first pitch, forming a plurality of second gates in the second region of the substrate, such that the second gates are spaced apart from each other at a second pitch different from the first pitch, implanting an etch rate adjusting dopant into the second region to form implanted regions, while blocking the first region, forming a first trench by etching the first region between the plurality of first gates, and forming a second trench by etching the second region between the plurality of second gates.

Abstract translation: 半导体器件的制造方法包括提供具有第一区域和第二区域的衬底，在衬底的第一区域中形成多个第一栅极，使得第一栅极以第一间距相互间隔开， 在所述衬底的所述第二区域中形成多个第二栅极，使得所述第二栅极以不同于所述第一间距的第二间距彼此间隔开，将蚀刻速率调节掺杂剂注入所述第二区域以形成注入区域， 同时阻挡第一区域，通过蚀刻多个第一栅极之间的第一区域形成第一沟槽，并且通过蚀刻多个第二栅极之间的第二区域形成第二沟槽。