Electronic device and control method therefor

    公开(公告)号:US11430137B2

    公开(公告)日:2022-08-30

    申请号:US16969026

    申请日:2019-03-26

    Abstract: An electronic device and a control method therefor are disclosed. A method for controlling an electronic device according to the present invention comprises the steps of: receiving a current frame; determining a region, within the current frame, where there is a movement, on the basis of a prior frame and the current frame; inputting the current frame into an artificial intelligence learning model on the basis of the region where there is the movement, to obtain information relating to at least one object included in the current frame; and determining the object included in the region where there is the movement, by using the obtained information relating to the at least one object. Therefore, electronic device can rapidly determine an object included in a frame configuring a captured image.

    Method and device for controlling data input and output of fully connected network

    公开(公告)号:US11755904B2

    公开(公告)日:2023-09-12

    申请号:US16970859

    申请日:2019-02-20

    CPC classification number: G06N3/08 G06F17/16 H03M7/46

    Abstract: The disclosure relates to an artificial intelligence (AI) system that simulates functions such as cognition and judgment of the human brain by utilizing machine learning algorithms such as deep learning and its applications. In particular, the disclosure provides a method of controlling data input and output of a fully connected network according to an artificial intelligence system and its applications, the method including receiving, from a learning circuit, an edge sequence representing a connection relationship between nodes included in a current layer of the fully connected network, generating a compressed edge sequence that compresses consecutive invalid bits among bit strings constituting the edge sequence into one bit and a validity determination sequence determining valid and invalid bits among the bit strings constituting the compressed edge sequence, writing the compressed edge sequence and the validity determination sequence to the memory, and sequentially reading the compressed edge sequences from the memory based on the validity determination sequence such that the valid bits are sequentially output to the learning circuit.

    Electronic system including FPGA and operation method thereof

    公开(公告)号:US11012075B2

    公开(公告)日:2021-05-18

    申请号:US16802927

    申请日:2020-02-27

    Abstract: An electronic system and an operation method thereof are disclosed. A method of an electronic system including a field programmable gate array (FPGA) includes: synthesizing, by processing circuitry, code of a high level language into code of a hardware description language; designing, by the processing circuitry, a circuit of an intellectual property (IP) block included in the field programmable gate array according to the code of the hardware description language; and generating, by the processing circuitry, a database containing reference assembly code corresponding to the code of the high level language and information about a circuit configuration of the intellectual property block.

    Electronic device, image processing method of electronic device, and computer-readable medium

    公开(公告)号:US12175361B2

    公开(公告)日:2024-12-24

    申请号:US16979303

    申请日:2019-03-06

    Abstract: The present disclosure relates to an artificial intelligence (AI) system that utilizes a machine learning algorithm, and applications therefore. Disclosed is an electronic device. The electronic device comprises: a storage unit which stores therein an artificial intelligence model trained to determine parameters for a plurality of filters used for image processing on the basis of a deep neural network (DNN); and a processor for determining, through the artificial intelligence mode, parameters for each of the plurality of filters used for image processing for an input image, and performing, through the plurality of filters, filtering of the input image on the basis of the determined parameters so as to perform image processing for the input image.

    Electronic system including FPGA and operation method thereof

    公开(公告)号:US11967952B2

    公开(公告)日:2024-04-23

    申请号:US17242737

    申请日:2021-04-28

    CPC classification number: H03K19/1776 G06F30/327

    Abstract: An electronic system and an operation method thereof are disclosed. A method of an electronic system including a field programmable gate array (FPGA) includes: synthesizing, by processing circuitry, code of a high level language into code of a hardware description language; designing, by the processing circuitry, a circuit of an intellectual property (IP) block included in the field programmable gate array according to the code of the hardware description language; and generating, by the processing circuitry, a database containing reference assembly code corresponding to the code of the high level language and information about a circuit configuration of the intellectual property block.

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