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公开(公告)号:US11966846B2
公开(公告)日:2024-04-23
申请号:US16281737
申请日:2019-02-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungho Kang , Hyungdal Kwon , Cheon Lee , Yunjae Lim
Abstract: An encoding apparatus connected to a learning circuit processing learning of a deep neural network and configured to perform encoding for reconfiguring connection or disconnection of a plurality of edges in a layer of the deep neural network using an edge sequence generated based on a random number sequence and dropout information indicating a ratio between connected edges and disconnected edges of a plurality of edges included in a layer of the deep neural network.
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公开(公告)号:US11430137B2
公开(公告)日:2022-08-30
申请号:US16969026
申请日:2019-03-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungho Kang , Yunjae Lim , Hyungdal Kwon , Cheon Lee
Abstract: An electronic device and a control method therefor are disclosed. A method for controlling an electronic device according to the present invention comprises the steps of: receiving a current frame; determining a region, within the current frame, where there is a movement, on the basis of a prior frame and the current frame; inputting the current frame into an artificial intelligence learning model on the basis of the region where there is the movement, to obtain information relating to at least one object included in the current frame; and determining the object included in the region where there is the movement, by using the obtained information relating to the at least one object. Therefore, electronic device can rapidly determine an object included in a frame configuring a captured image.
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公开(公告)号:US11755904B2
公开(公告)日:2023-09-12
申请号:US16970859
申请日:2019-02-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyungdal Kwon , Sungho Kang , Cheon Lee , Yunjae Lim
Abstract: The disclosure relates to an artificial intelligence (AI) system that simulates functions such as cognition and judgment of the human brain by utilizing machine learning algorithms such as deep learning and its applications. In particular, the disclosure provides a method of controlling data input and output of a fully connected network according to an artificial intelligence system and its applications, the method including receiving, from a learning circuit, an edge sequence representing a connection relationship between nodes included in a current layer of the fully connected network, generating a compressed edge sequence that compresses consecutive invalid bits among bit strings constituting the edge sequence into one bit and a validity determination sequence determining valid and invalid bits among the bit strings constituting the compressed edge sequence, writing the compressed edge sequence and the validity determination sequence to the memory, and sequentially reading the compressed edge sequences from the memory based on the validity determination sequence such that the valid bits are sequentially output to the learning circuit.
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公开(公告)号:US11012075B2
公开(公告)日:2021-05-18
申请号:US16802927
申请日:2020-02-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyungdal Kwon , Seungwook Lee , Youngnam Hwang
IPC: H03K19/17 , G06F30/32 , H03K19/1776 , G06F30/327
Abstract: An electronic system and an operation method thereof are disclosed. A method of an electronic system including a field programmable gate array (FPGA) includes: synthesizing, by processing circuitry, code of a high level language into code of a hardware description language; designing, by the processing circuitry, a circuit of an intellectual property (IP) block included in the field programmable gate array according to the code of the hardware description language; and generating, by the processing circuitry, a database containing reference assembly code corresponding to the code of the high level language and information about a circuit configuration of the intellectual property block.
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公开(公告)号:US12175361B2
公开(公告)日:2024-12-24
申请号:US16979303
申请日:2019-03-06
Applicant: Samsung Electronics Co., Ltd.
Inventor: Cheon Lee , Sungho Kang , Hyungdal Kwon , Yunjae Lim
Abstract: The present disclosure relates to an artificial intelligence (AI) system that utilizes a machine learning algorithm, and applications therefore. Disclosed is an electronic device. The electronic device comprises: a storage unit which stores therein an artificial intelligence model trained to determine parameters for a plurality of filters used for image processing on the basis of a deep neural network (DNN); and a processor for determining, through the artificial intelligence mode, parameters for each of the plurality of filters used for image processing for an input image, and performing, through the plurality of filters, filtering of the input image on the basis of the determined parameters so as to perform image processing for the input image.
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公开(公告)号:US12001954B2
公开(公告)日:2024-06-04
申请号:US16281737
申请日:2019-02-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungho Kang , Hyungdal Kwon , Cheon Lee , Yunjae Lim
Abstract: An encoding apparatus connected to a learning circuit processing learning of a deep neural network and configured to perform encoding for reconfiguring connection or disconnection of a plurality of edges in a layer of the deep neural network using an edge sequence generated based on a random number sequence and dropout information indicating a ratio between connected edges and disconnected edges of a plurality of edges included in a layer of the deep neural network.
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公开(公告)号:US11967952B2
公开(公告)日:2024-04-23
申请号:US17242737
申请日:2021-04-28
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyungdal Kwon , Seungwook Lee , Youngnam Hwang
IPC: G06F30/327 , H03K19/1776
CPC classification number: H03K19/1776 , G06F30/327
Abstract: An electronic system and an operation method thereof are disclosed. A method of an electronic system including a field programmable gate array (FPGA) includes: synthesizing, by processing circuitry, code of a high level language into code of a hardware description language; designing, by the processing circuitry, a circuit of an intellectual property (IP) block included in the field programmable gate array according to the code of the hardware description language; and generating, by the processing circuitry, a database containing reference assembly code corresponding to the code of the high level language and information about a circuit configuration of the intellectual property block.
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公开(公告)号:US11809954B2
公开(公告)日:2023-11-07
申请号:US16281737
申请日:2019-02-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungho Kang , Hyungdal Kwon , Cheon Lee , Yunjae Lim
Abstract: An encoding apparatus connected to a learning circuit processing learning of a deep neural network and configured to perform encoding for reconfiguring connection or disconnection of a plurality of edges in a layer of the deep neural network using an edge sequence generated based on a random number sequence and dropout information indicating a ratio between connected edges and disconnected edges of a plurality of edges included in a layer of the deep neural network.
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