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公开(公告)号:US20180366456A1
公开(公告)日:2018-12-20
申请号:US15867686
申请日:2018-01-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangnam JEONG , IlJoon Kim , SunWon KANG
IPC: H01L25/16 , H01L23/00 , H01L23/522 , H01L23/48
Abstract: Disclosed is a semiconductor package including a semiconductor chip, a first outer capacitor on the semiconductor chip including a first electrode and a second electrode, a second outer capacitor on the semiconductor chip including a first electrode pattern and a second electrode pattern, and a conductive pattern on the semiconductor chip and electrically connected to the first electrode of the first outer capacitor and the first electrode pattern of the second outer capacitor. The second electrode of the first outer capacitor is insulated from the second electrode pattern of the second outer capacitor.
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公开(公告)号:US10797030B2
公开(公告)日:2020-10-06
申请号:US15867686
申请日:2018-01-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangnam Jeong , IlJoon Kim , SunWon Kang
IPC: H01L25/16 , H01L23/00 , H01L23/522 , H01L23/48 , H01L23/538 , H01L23/50 , H01L23/498
Abstract: Disclosed is a semiconductor package including a semiconductor chip, a first outer capacitor on the semiconductor chip including a first electrode and a second electrode, a second outer capacitor on the semiconductor chip including a first electrode pattern and a second electrode pattern, and a conductive pattern on the semiconductor chip and electrically connected to the first electrode of the first outer capacitor and the first electrode pattern of the second outer capacitor. The second electrode of the first outer capacitor is insulated from the second electrode pattern of the second outer capacitor.
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公开(公告)号:US11018121B2
公开(公告)日:2021-05-25
申请号:US16438430
申请日:2019-06-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangnam Jeong , IlJoon Kim , SunWon Kang
IPC: H01L25/16 , H01L23/00 , H01L23/522 , H01L23/48 , H01L23/538 , H01L23/50 , H01L23/498
Abstract: Disclosed is a semiconductor package including a semiconductor chip, a first outer capacitor on the semiconductor chip including a first electrode and a second electrode, a second outer capacitor on the semiconductor chip including a first electrode pattern and a second electrode pattern, and a conductive pattern on the semiconductor chip and electrically connected to the first electrode of the first outer capacitor and the first electrode pattern of the second outer capacitor. The second electrode of the first outer capacitor is insulated from the second electrode pattern of the second outer capacitor.
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