公开(公告)号：US20240038809A1

公开(公告)日：2024-02-01

申请号：US18333191

申请日：2023-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ja Meyung Kim ,  Sung In Kim ,  Yeon Soo Ahn

IPC: H01L27/146

CPC classification number: H01L27/1463 ,  H01L27/14603 ,  H01L27/14636 ,  H01L27/14621

Abstract: An image sensor includes a substrate including a first face and a second face, the second face being opposite the first face in a first direction; a photoelectric conversion area disposed in the substrate; an active area disposed in the substrate and on the photoelectric conversion area; an element isolation pattern extending from the first face of the substrate into the substrate and defining the active area; and a transfer gate electrode including: a first portion extending from the first face of the substrate and extending through the element isolation pattern; and a second portion disposed on the active area, wherein the first portion extends through a bottom face of the element isolation pattern, wherein a vertical level of a bottom face of the first portion is lower than a vertical level of the bottom face of the element isolation pattern.

公开(公告)号：US12027556B2

公开(公告)日：2024-07-02

申请号：US17383976

申请日：2021-07-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong Mo Im ,  Ja Meyung Kim ,  Jong Eun Park ,  Beom Suk Lee ,  Kwan Sik Cho

IPC: H01L27/146 ,  H01L27/148

CPC classification number: H01L27/1463 ,  H01L27/14603 ,  H01L27/14636 ,  H01L27/14643 ,  H01L27/14685 ,  H01L27/14831

Abstract: An image sensor includes a substrate, a photoelectric conversion region disposed inside the substrate, a first active region disposed inside the substrate to include a ground region, a floating diffusion region, and a channel region for connecting the ground region and the floating diffusion region, a substrate trench disposed inside the channel region, a transfer gate disposed on a face of the substrate to include a lower gate which fills a part of the substrate trench and has a first width, and an upper gate having a second width smaller than the first width on the lower gate, and a gate spacer disposed inside the substrate trench to be interposed between the ground region and the upper gate.