公开(公告)号：US20240242770A1

公开(公告)日：2024-07-18

申请号：US18400049

申请日：2023-12-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hojoon KIM ,  Jae-Duk YU ,  Yohan LEE ,  Jiho CHO

IPC: G11C16/34 ,  G11C16/04

CPC classification number: G11C16/3427 ,  G11C16/0483

Abstract: A non-volatile memory device according to some example embodiments includes a memory block including a plurality of cell strings including a plurality of string selection transistors and a plurality of memory cells, a first string selection line connected to a string selection transistor of a first cell string of the plurality of cell strings, and a second string selection line connected to a string selection transistor of a second cell string of the plurality of cell strings; and a control circuit configured to control a recovery operation to apply a recovery voltage with different driving strengths to the first string selection line and the second string selection line.

公开(公告)号：US20210089394A1

公开(公告)日：2021-03-25

申请号：US16851434

申请日：2020-04-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Duk YU ,  Jin-Young KIM

IPC: G06F11/10 ,  G11C29/52 ,  G11C13/00 ,  G11C16/04 ,  G11C16/34

Abstract: A storage device includes a first nonvolatile memory chip; a second nonvolatile memory chip; and a controller. The controller may include a processor configured to execute a flash translation layer (FTL) loaded onto an on-chip memory; an ECC engine configured to generate first parity bits for data and to selectively generate second parity bits for the data, under control of the processor; and a nonvolatile memory interface circuit configured to transmit the data and the first parity bits to the first nonvolatile memory chip, and to selectively transmit the second parity bits selectively generated to the second nonvolatile memory chip.