公开(公告)号：US20240267448A1

公开(公告)日：2024-08-08

申请号：US18597064

申请日：2024-03-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehong JUNG ,  Gyeongtae KIM ,  Yongseok LEE ,  Jinman KIM ,  Souksu JANG ,  Hyeyeong CHOI ,  Jiwoo LEE

IPC: H04M1/02 ,  G03B17/56 ,  H04N23/51

CPC classification number: H04M1/0264 ,  G03B17/561 ,  H04N23/51

Abstract: An electronic device is disclosed herein. The device includes a housing including a first opening formed in a surface thereof, a camera at least partially disposed in the housing, such that a lens of the camera is aligned with the first opening, a camera bracket including a flange structure disposed in the housing and spaced apart from the surface of the housing at a predetermined interval, a protruding structure extending from the flange structure into a space defined between the camera and an inner wall of the first opening to surround at least part of the camera, wherein the flange structure includes a first through-hole, and the protruding structure includes a recess, and wherein the protruding structure and the inner wall of the first opening form a microphone hole in communication with the recess and part of the first opening, an adhesive member disposed between the flange structure and an inner surface of the housing, the adhesive member including a passage, wherein one side of the passage is connected to the recess, and an opposite side of the passage is connected to the first through-hole, and a microphone element disposed in the housing and aligned with the first through-hole.

公开(公告)号：US20230345048A1

公开(公告)日：2023-10-26

申请号：US18341936

申请日：2023-06-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehong JUNG ,  Juhyung SON ,  Dongcheol KIM ,  Geonjung KO ,  Jinsam KWAK

IPC: H04N19/61 ,  H04N19/132 ,  H04N19/176 ,  H04N19/18 ,  H04N19/70

CPC classification number: H04N19/61 ,  H04N19/132 ,  H04N19/176 ,  H04N19/18 ,  H04N19/70

Abstract: A video signal decoding apparatus, comprising a processor, wherein the processor is configured to: parse a syntax element related to a secondary transform of a coding unit based on whether a prediction method of the coding unit is MIP (Matrix based Intra Prediction), check whether or not the secondary transform is applied to a transform block included in the coding unit based on the parsed syntax element, obtain one or more inverse transform coefficients based on an inverse transform of the secondary transform when the secondary transform is applied to the transform block, obtain a residual sample for the transform block based on the one or more inverse transform coefficients.

公开(公告)号：US20220407459A1

公开(公告)日：2022-12-22

申请号：US17845378

申请日：2022-06-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehong JUNG ,  Seunghyun OH ,  Jinhyeon LEE ,  Gihyeok HA ,  Seungjin KIM ,  Joomyoung KIM ,  Yelim YOUN ,  Jaehoon LEE

IPC: H03B5/32 ,  H03B5/20 ,  H03B5/04 ,  G06F1/06

Abstract: A clock integrated circuit is provided. The clock integrated circuit includes: a first clock generator which includes a crystal oscillator configured to generate a first clock signal; and a second clock generator which includes a resistance-capacitance (RC) oscillator and a first frequency divider, and is configured to: generate a second clock signal using the first frequency divider based on a clock signal output from the RC oscillator; perform a first calibration operation for adjusting a frequency division ratio of the first frequency divider to a first frequency division ratio based on the first clock signal; and perform a second calibration operation for adjusting the first frequency division ratio to a second frequency division ratio based on a sensed temperature.

公开(公告)号：US20240298043A1

公开(公告)日：2024-09-05

申请号：US18662687

申请日：2024-05-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehong JUNG ,  Juhyung Son ,  Dongcheol Kim ,  Geonjung Ko ,  Jinsam Kwak

IPC: H04N19/96 ,  H04N19/176 ,  H04N19/184 ,  H04N19/70

CPC classification number: H04N19/96 ,  H04N19/176 ,  H04N19/184 ,  H04N19/70

Abstract: A video signal processing method comprises: obtaining, from a bitstream, a skip parameter (cu_skip_flag) indicating whether a skip mode is applied to a current block; when the skip parameter indicates that a mode is not the skip mode, obtaining, from the bitstream, a merge parameter (merge_flag) indicating whether the current block is coded with a merge mode; and determining whether a coded block flag (CBF) parameter (cu_cbf), which indicates whether a syntax element related to transform is obtained from the bitstream, is obtained, according to a value of the merge parameter, wherein, when the value of the merge parameter indicates the merge mode, the CBF parameter is not obtained from the bitstream and is determined to be a preconfigured value.

公开(公告)号：US20240283908A1

公开(公告)日：2024-08-22

申请号：US18625275

申请日：2024-04-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46 ,  H04N19/82

CPC classification number: H04N19/105 ,  H04N19/132 ,  H04N19/159 ,  H04N19/176 ,  H04N19/46 ,  H04N19/82

Abstract: A video signal processing method includes: a step for deriving an intra prediction mode of a current block; a step for constructing a reference sample around the current block; a step for generating a prediction sample of the current block by using the reference sample on the basis of the intra prediction mode; and a step for restoring the current block on the basis of the prediction sample. The step for generating the prediction sample may include: a step for setting a filter flag value which specifies a filter coefficient of an interpolation filter applied to the reference sample on the basis of the width and height of the current block; and a step for performing filtering on the reference sample by using the interpolation filter having the filter coefficient specified by the filter flag.

公开(公告)号：US20240015330A1

公开(公告)日：2024-01-11

申请号：US18352775

申请日：2023-07-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehong JUNG ,  Juhyung SON ,  Dongcheol KIM ,  Geonjung KO ,  Jinsam KWAK

IPC: H04N19/12 ,  H04N19/176 ,  H04N19/18 ,  H04N19/625

CPC classification number: H04N19/12 ,  H04N19/176 ,  H04N19/18 ,  H04N19/625

Abstract: A video signal processor is configured to: obtain at least one transform block for a residual signal of a current block from a video signal bitstream, wherein the transform block comprises a plurality of transform coefficients two-dimensionally arranged, determine, on the basis of length information of a first side of the transform block, a horizontal transform kernel for horizontal transformation of the transform block, regardless of a length of a second side of the transform block, which is orthogonal to the first side, determine, on the basis of length information of the second side, a vertical transform kernel for vertical transformation of the transform block, regardless of a length of the first side, obtain the residual signal of the current block by performing, on the transform block, inverse transformation using the horizontal transform kernel and the vertical transform kernel, and reconstruct the current block based on the residual signal.

公开(公告)号：US20230403409A1

公开(公告)日：2023-12-14

申请号：US18238977

申请日：2023-08-28

Applicant: SAMSUNG ELECTRONICS CO.,LTD.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung Son ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/593 ,  H04N19/11 ,  H04N19/136 ,  H04N19/176

CPC classification number: H04N19/593 ,  H04N19/11 ,  H04N19/136 ,  H04N19/176

Abstract: Disclosed are a video signal processing method and apparatus for encoding or decoding a video signal. In more detail, the video signal processing method includes receiving intra prediction mode information for a current block, wherein the intra prediction mode information indicates one of a plurality of intra prediction modes configuring an intra prediction mode set; and decoding the current block based on the received intra prediction mode information, wherein the intra prediction mode set comprises a plurality of angle modes, and the plurality of angle modes comprises a basic angle mode and an extended angle mode, wherein the extended angle mode is signaled based on the basic angle mode.

公开(公告)号：US20230126913A1

公开(公告)日：2023-04-27

申请号：US18146534

申请日：2022-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehong JUNG ,  Juhyung SON ,  Dongcheol KIM ,  Geonjung KO ,  Jinsam KWAK

IPC: H04N19/96 ,  H04N19/176 ,  H04N19/184 ,  H04N19/70

Abstract: A video signal processing method comprises: obtaining, from a bitstream, a skip parameter (cu_skip_flag) indicating whether a skip mode is applied to a current block; when the skip parameter indicates that a mode is not the skip mode, obtaining, from the bitstream, a merge parameter (merge_flag) indicating whether the current block is coded with a merge mode; and determining whether a coded block flag (CBF) parameter (cu_cbf), which indicates whether a syntax element related to transform is obtained from the bitstream, is obtained, according to a value of the merge parameter, wherein, when the value of the merge parameter indicates the merge mode, the CBF parameter is not obtained from the bitstream and is determined to be a preconfigured value.

公开(公告)号：US20230291354A1

公开(公告)日：2023-09-14

申请号：US18152418

申请日：2023-01-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehong JUNG ,  Seungjin Kim ,  Seunghyun Oh

IPC: H03B5/36 ,  H03L7/099

CPC classification number: H03B5/36 ,  H03L7/099 ,  H03B2200/009

Abstract: An oscillator includes a crystal oscillation circuit configured to generate an oscillation signal having a natural frequency, an injection circuit configured to inject a first injection signal and a second injection signal into the crystal oscillation circuit, a dithering circuit configured to transmit a first control signal for generating the first injection signal to the injection circuit, and a phased-lock loop (PLL) circuit configured to lock a phase of the first injection signal to the natural frequency, to transmit a second control signal for generating the second injection signal to the injection circuit.

公开(公告)号：US20220360655A1

公开(公告)日：2022-11-10

申请号：US17872101

申请日：2022-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaehong JUNG ,  Gyeongtae KIM ,  Yongseok LEE ,  Jinman KIM ,  Souksu JANG ,  Hyeyeong CHOI ,  Jiwoo LEE

IPC: H04M1/02 ,  G03B17/56 ,  H04N5/225

Abstract: An electronic device is disclosed herein. The device includes a housing including a first opening formed in a surface thereof, a camera at least partially disposed in the housing, such that a lens of the camera is aligned with the first opening, a camera bracket including a flange structure disposed in the housing and spaced apart from the surface of the housing at a predetermined interval, a protruding structure extending from the flange structure into a space defined between the camera and an inner wall of the first opening to surround at least part of the camera, wherein the flange structure includes a first through-hole, and the protruding structure includes a recess, and wherein the protruding structure and the inner wall of the first opening form a microphone hole in communication with the recess and part of the first opening, an adhesive member disposed between the flange structure and an inner surface of the housing, the adhesive member including a passage, wherein one side of the passage is connected to the recess, and an opposite side of the passage is connected to the first through-hole, and a microphone element disposed in the housing and aligned with the first through-hole.