公开(公告)号：US20240086599A1

公开(公告)日：2024-03-14

申请号：US18509654

申请日：2023-11-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjoong Kim ,  Jaepil Shin ,  Moonhyun Cha ,  Changwook Jeong

IPC: G06F30/27 ,  G06N3/045 ,  G06N3/08

CPC classification number: G06F30/27 ,  G06N3/045 ,  G06N3/08 ,  G06F2119/02

Abstract: A system for modeling a semiconductor fabrication process includes at least one first processor and at least one second processor. The at least one first processor is configured to provide at least one machine learning (ML) model, which is trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample. The physical pattern sample is formed from the design pattern sample by using the semiconductor fabrication process. The at least one second processor is configured to provide an input image representing a shape of a design pattern and/or a physical pattern to the at least one first processor and to generate output data defining the physical pattern and/or the design pattern based on an output image received from the at least one first processor.

公开(公告)号：US20220092239A1

公开(公告)日：2022-03-24

申请号：US17231428

申请日：2021-04-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjoong Kim ,  Jaepil Shin ,  Moonhyun Cha ,  Changwook Jeong

IPC: G06F30/27 ,  G06N3/08 ,  G06N3/04

Abstract: A system for modeling a semiconductor fabrication process includes at least one first processor and at least one second processor. The at least one first processor is configured to provide at least one machine learning (ML) model, which is trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample. The physical pattern sample is formed from the design pattern sample by using the semiconductor fabrication process. The at least one second processor is configured to provide an input image representing a shape of a design pattern and/or a physical pattern to the at least one first processor and to generate output data defining the physical pattern and/or the design pattern based on an output image received from the at least one first processor.

公开(公告)号：US11853660B2

公开(公告)日：2023-12-26

申请号：US17231428

申请日：2021-04-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunjoong Kim ,  Jaepil Shin ,  Moonhyun Cha ,  Changwook Jeong

IPC: H01L21/027 ,  G06F30/39 ,  G06F30/27 ,  G06N3/08 ,  G06N3/045 ,  G06F119/02 ,  G06F119/18

CPC classification number: G06F30/27 ,  G06N3/045 ,  G06N3/08 ,  G06F2119/02 ,  G06F2119/18

Abstract: A system for modeling a semiconductor fabrication process includes at least one first processor and at least one second processor. The at least one first processor is configured to provide at least one machine learning (ML) model, which is trained by using a plurality of pairs of images of a design pattern sample and a physical pattern sample. The physical pattern sample is formed from the design pattern sample by using the semiconductor fabrication process. The at least one second processor is configured to provide an input image representing a shape of a design pattern and/or a physical pattern to the at least one first processor and to generate output data defining the physical pattern and/or the design pattern based on an output image received from the at least one first processor.