公开(公告)号：US09825081B2

公开(公告)日：2017-11-21

申请号：US15229265

申请日：2016-08-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taeseok Oh ,  Junetaeg Lee ,  Seung-Hun Shin ,  Jaesang Yoo

IPC: H01L31/0232 ,  H01L27/146 ,  H01L23/48 ,  H01L25/065 ,  H01L23/532

CPC classification number: H01L27/14636 ,  H01L21/187 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L25/0657 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/1464 ,  H01L27/14687 ,  H01L27/1469

Abstract: A semiconductor device includes a substrate, a circuit layer formed on a first surface of the substrate and including a via pad and an interlayer insulating layer covering the via pad, a via structure configured to fully pass through the substrate, partially pass through the interlayer insulating layer and be in contact with the via pad, a via isolation insulating layer configured to pass through the substrate and be spaced apart from outer side surfaces of the via structure in a horizontal direction and a pad structure buried in the substrate and exposed on a second surface of the substrate opposite the first surface of the substrate.