公开(公告)号：US20250159952A1

公开(公告)日：2025-05-15

申请号：US18659659

申请日：2024-05-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeyoung Lim ,  HANSEONG KIM ,  DONGHYUN ROH ,  JoonYong Bae ,  GYUHWAN AHN ,  JANGHO LEE

IPC: H01L29/06 ,  H01L29/08 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device including an active pattern located on a substrate, spaced apart from other active patterns in a first direction and extending in a second direction different from the first direction; source/drain patterns located on the active pattern and each source drain pattern spaced apart from one another in the second direction; a channel pattern located between adjacent source/drain patterns; a gate pattern extending between the adjacent source/drain patterns in the first direction and surrounding at least a portion of the channel pattern; and an isolation structure extending in the first direction, the isolation structure located outside the source/drain pattern in the second direction and extending into the active pattern in a third direction different from the first and second directions, in which the isolation structure includes insulating patterns stacked in the third direction, an interfacial layer located between insulating patterns, and an insulating liner surrounding the insulating patterns.