公开(公告)号：US20240256185A1

公开(公告)日：2024-08-01

申请号：US18628917

申请日：2024-04-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eldho Mathew PATHIYAKKARA THOMBRA ,  Prashant Vishwanath Mahendrakar ,  Jin In So ,  Jong-Geon Lee

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

Abstract: A method for operating a Near Memory Processing (NMP) Dual In-line Memory Module (DIMM) for DIMM-to-DIMM communication is provided. The NMP DIMM includes one or more ports for communicative connection to other NMP DIMMs. The method includes parsing, by one NMP DIMM, a NMP command received from a processor of a host platform, identifying data dependencies on one or more other NMP DIMMs based on the parsing, establishing communication with the one or more other NMP DIMMs through one or more ports of the one NMP DIMM, receiving data from the one or more other NMP DIMMs through one or more ports of the one NMP DIMM, processing the NMP command using the data received from one of the one or more other NMP DIMMs and data present in the one NMP DIMM, and sending a NMP command completion notification to the processor of the host platform.

公开(公告)号：US11977780B2

公开(公告)日：2024-05-07

申请号：US17746562

申请日：2022-05-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eldho Mathew Pathiyakkara Thombra ,  Prashant Vishwanath Mahendrakar ,  Jin In So ,  Jong-Geon Lee

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

Abstract: A method for operating a Near Memory Processing (NMP) Dual In-line Memory Module (DIMM) for DIMM-to-DIMM communication is provided. The NMP DIMM includes one or more ports for communicative connection to other NMP DIMMs. The method includes parsing, by one NMP DIMM, a NMP command received from a processor of a host platform, identifying data dependencies on one or more other NMP DIMMs based on the parsing, establishing communication with the one or more other NMP DIMMs through one or more ports of the one NMP DIMM, receiving data from the one or more other NMP DIMMs through one or more ports of the one NMP DIMM, processing the NMP command using the data received from one of the one or more other NMP DIMMs and data present in the one NMP DIMM, and sending a NMP command completion notification to the processor of the host platform.

公开(公告)号：US20250077433A1

公开(公告)日：2025-03-06

申请号：US18604783

申请日：2024-03-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Daehoon Kim ,  Hyungwon Park ,  Jin Jung ,  Minho Kim ,  Jin In So ,  Jong-Geon Lee ,  Hwanjun Lee ,  Minwoo Jang ,  Yeaji Jung

IPC: G06F12/0862

Abstract: Memory systems and methods for operating the same. A memory system comprises a first memory, a second memory having an operating speed different from that of the first memory, a storage unit configured to store an instruction, a prefetcher configured to update prefetcher data in response to occurrence of cache hits and a processor configured to execute the instruction stored in the storage unit. When the instruction is executed, the processor is configured to generate prefetcher friendly data by filtering the prefetcher data, set a prefetcher friendly bit in a first pointer area corresponding to the first memory and a second pointer area corresponding to the second memory based on the prefetcher friendly data, and determine whether data of the first pointer area and the second pointer area are migrated, in consideration of a reference bit and the prefetcher friendly bit of the first and second pointer areas.

公开(公告)号：US12045510B2

公开(公告)日：2024-07-23

申请号：US17874370

申请日：2022-07-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Eldho Pathiyakkara Thombra Mathew ,  Prashant Vishwanath Mahendrakar ,  Jin In So ,  Jong-Geon Lee

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0607 ,  G06F3/0658 ,  G06F3/061 ,  G06F3/0683

Abstract: A Near Memory Processing (NMP) module including: a plurality of memory units; an Input/Output (I/O) interface configured to receive commands from a host system, wherein the host system includes a host memory controller configured to access the plurality of memory units; a decoder configured to decode the commands and generate a trigger; and an NMP memory controller configured to: receive the trigger from the decoder; and generate a signal in response to the trigger to synchronize the NMP module with the host system.

公开(公告)号：US11797440B2

公开(公告)日：2023-10-24

申请号：US17854772

申请日：2022-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Raghu Vamsi Krishna Talanki ,  Eldho Pathiyakkara Thombra Mathew ,  Vishnu Charan Thummala ,  Vinod Kumar Srinivasan ,  Jin In So ,  Jong-Geon Lee

IPC: G06F12/06

CPC classification number: G06F12/063 ,  G06F2212/206

Abstract: A Near Memory Processing (NMP) dual in-line memory module (DIMM) for managing an address map is provided. The NMP DIMM includes: a static random-access memory (SRAM) provided on a Double Data Rate (DDR) interface; and an address management controller coupled to the SRAM, and configured to control the NMP DIMM to: receive a first indication from a host system to perform interface training for operating an SRAM space; perform the interface training using a first address map based on the first indication; receive a second indication from the host system indicating completion of the interface training for operating the SRAM space; switch from the first address map to a second address map for operating the SRAM space in response based on the second indication; and operate the SRAM space using the second address map.