METHOD OF DRIVING LIGHT EMITTING DIODE BACKLIGHT UNIT AND DISPLAY DEVICE PERFORMING THE SAME

    公开(公告)号:US20240105130A1

    公开(公告)日:2024-03-28

    申请号:US18530891

    申请日:2023-12-06

    CPC classification number: G09G3/3406 G09G3/32

    Abstract: A method of driving a light emitting diode (LED) backlight unit, which includes a plurality of LED elements that are connected to a plurality of gate lines and a plurality of source lines, includes generating a plurality of gate signals applied to the plurality of gate lines. While the plurality of gate signals are generated, a non-overlap interval between activation intervals of two adjacent gate signals is generated. All of the plurality of gate signals are deactivated during the non-overlap interval. A plurality of source signals applied to the plurality of source lines are generated. While the plurality of source signals are generated, a high-impedance (Hi-Z) interval included in the non-overlap interval is generated. At least some of the plurality of source signals have a high-impedance state during the high-impedance interval.

    DISPLAY DEVICE INCLUDING LIGHT-EMITTING DIODE BACKLIGHT UNIT

    公开(公告)号:US20220180801A1

    公开(公告)日:2022-06-09

    申请号:US17537950

    申请日:2021-11-30

    Abstract: A display device may include: a light-emitting diode (LED) backlight unit (BLU), a pixel driving circuit configured to generate a scan signal and an image signal, a pixel circuit configured to generate an output current based on the scan signal and the image signal, and transmit the output current to the LED BLU, the pixel circuit including, a first transistor connected between an input pin and a node, the input pin configured to receive the image signal, the first transistor including a gate terminal configured to receive the scan signal, a second transistor connected between the node and a ground terminal, the second transistor including a gate terminal connected to the node, a third transistor connected between the node and a gate node, a fourth transistor configured to generate the output current according to a voltage of the gate node, and a capacitor connected to the gate node.

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