-
公开(公告)号:US20130183839A1
公开(公告)日:2013-07-18
申请号:US13742551
申请日:2013-01-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jong-Hyun SEOK , Kyoung-Sun KIM
IPC: H05K1/11
CPC classification number: H05K1/117 , H01L2924/0002 , H05K2201/094 , H01L2924/00
Abstract: A printed circuit board (PCB) includes a substrate body including a circuit wiring layer; tap terminals provided at a surface of the substrate body and in a peripheral region of the substrate body and electrically connected to the circuit wiring layer; and plating wires corresponding to respective tap terminals, each plating wire extending from an end portion of its respective tap terminal toward an edge of the substrate body and having a line width smaller than a line width of the tap terminal. For at least a first tap terminal, the tap terminal shares an edge with an edge of its respective plating wire. A second tap terminal adjacent the first tap terminal is positioned outside a circle having a radius that equals a length of the plating wire and having a center at a point along the shared edge where the plating wire and first tap terminal connect.
Abstract translation: 印刷电路板(PCB)包括:基板主体,包括电路布线层; 抽头端子,其设置在所述基板主体的表面和所述基板主体的周边区域中,并电连接到所述电路布线层; 以及对应于各个抽头端子的电镀线,每个电镀线从其各个抽头端子的端部朝向衬底主体的边缘延伸并且具有小于抽头端子的线宽的线宽。 对于至少第一抽头端子,抽头端子与其各自电镀线的边缘共享边缘。 与第一抽头端子相邻的第二抽头端子位于具有等于电镀线长度的半径的圆的外侧,并且具有沿着电镀线和第一抽头端子连接的共享边缘的点的中心。
-
公开(公告)号:US20240266305A1
公开(公告)日:2024-08-08
申请号:US18240576
申请日:2023-08-31
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jong-Hyun SEOK , Dan-Kyu KANG , Hwanwook PARK , Kang-Gyu LEE , Jeonghyeon CHO
IPC: H01L23/60 , H01L23/13 , H01L23/498 , H01L25/065
CPC classification number: H01L23/60 , H01L23/13 , H01L23/49811 , H01L23/49838 , H01L25/0655
Abstract: A semiconductor module includes a board including a chip area and a tab area sequentially arranged in a first direction, a semiconductor chip provided on the chip area, a plurality of signal tabs provided on the tab area, and at least one anti-static portion having conductivity, provided in the tab area, and spaced apart from the plurality of signal tabs, where the plurality of signal tabs and the at least one anti-static portion are sequentially arranged in the first direction and the at least one anti-static portion is disposed on a line extending from at least one of the plurality of signal tabs in the first direction.
-
公开(公告)号:US20150078055A1
公开(公告)日:2015-03-19
申请号:US14325867
申请日:2014-07-08
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jong-Hyun SEOK , Dohyung KIM , Kwangseop KIM , Young-Ho LEE
IPC: G11C11/401
CPC classification number: G11C11/401 , G11C5/025 , G11C5/04
Abstract: A memory module includes a printed circuit board; first memory chips disposed in parallel with a long axis of the printed circuit board along a first column; second memory chips disposed in parallel with the long axis of the printed circuit board along a second column; and passive elements disposed between the first memory chips and the second memory chips, wherein the passive elements are connected between input/output pins of each of the first and second memory chips and tap pins.
Abstract translation: 存储模块包括印刷电路板; 第一存储器芯片,沿着第一列与印刷电路板的长轴平行设置; 第二存储器芯片沿着第二列与印刷电路板的长轴平行布置; 以及设置在所述第一存储器芯片和所述第二存储器芯片之间的无源元件,其中所述无源元件连接在所述第一存储器芯片和所述第二存储器芯片中的每一个的输入/输出引脚之间。
-
-