公开(公告)号：US20240292538A1

公开(公告)日：2024-08-29

申请号：US18573983

申请日：2022-06-22

Applicant: Guangzhou Kanglong Electronics Co., Ltd.

Inventor： Tielong Kang ,  Zhiming Liang

IPC: H05K1/14 ,  H05K1/11

CPC classification number: H05K1/14 ,  H05K1/117 ,  H05K2201/09172 ,  H05K2201/094

Abstract: The present disclosure is a three-dimensional wired circuit board structure, including a bottom board, the bottom board having a first slot and a first pin thereon; a function board, the function board having a second pin and a third pin thereon; and a bridge board, the bridge board having a second slot and a fourth pin thereon. The bottom of the function board is inserted into the second slot and the second pin is connected to the fourth pin, so as to form a combined function module. The combined function module is inserted into the first slot, and the third pin is connected to the first pin.

公开(公告)号：US20240234326A9

公开(公告)日：2024-07-11

申请号：US18489952

申请日：2023-10-19

Applicant: IBIDEN CO., LTD.

Inventor： Ikuya TERAUCHI ,  Shogo FUKUI ,  Ryo ANDO ,  Keisuke SHIMIZU

IPC: H01L23/538 ,  H05K1/11

CPC classification number: H01L23/5383 ,  H01L23/5386 ,  H05K1/116 ,  H05K2201/0939 ,  H05K2201/094

Abstract: A wiring substrate includes first conductor pads formed on a surface of an insulating layer, second conductor pads formed on the surface of the insulating layer, a second insulating layer covering the surface of the insulating layer and first and second conductor pads, first via conductors formed in first via holes penetrating through the second insulating layer such that the first via conductors are formed on the first conductor pads, and second via conductors formed in second via holes penetrating through the second insulating layer such that the second via conductors are formed on the second conductor pads. The first and second conductor pads are formed such that an annular width amount of each second conductor pad is smaller than an annular width amount of each first conductor pad and that a haloing amount in each second conductor pad is smaller than a haloing amount in each first conductor pad.

公开(公告)号：US12022618B2

公开(公告)日：2024-06-25

申请号：US17237604

申请日：2021-04-22

Applicant: Western Digital Technologies, Inc.

Inventor： Chien Te Chen ,  Cong Zhang ,  Yu Ying Tan ,  Hsiao Jung Lin ,  Chieh Kai Yang

IPC: H05K1/18 ,  H05K1/11 ,  H05K3/24 ,  H05K3/28 ,  H05K3/34 ,  H01L25/065 ,  H01L25/18

CPC classification number: H05K1/181 ,  H05K1/111 ,  H05K3/24 ,  H05K3/284 ,  H05K3/3442 ,  H01L25/0652 ,  H01L25/18 ,  H05K2201/094 ,  H05K2201/10015 ,  H05K2201/10022 ,  H05K2201/1003 ,  H05K2201/10159 ,  H05K2201/10515 ,  H05K2203/1316 ,  H05K2203/1322

Abstract: A substrate of an electronic device includes a first set of contact pads and a first set of contact pillars having a height greater than the first set of contact pads. Components are coupled to the first set of contact pads and the first set of contact pillars in traversing directions. The components coupled to the contact pillars are positioned above the components coupled to the first set of contact pads such that at least a first portion of a first side of the component coupled to the contact traces faces a first side of the components coupled to the contact pillars. Stacking passive components in this manner can allow for increased component density without increasing package size.

公开(公告)号：US20240172362A1

公开(公告)日：2024-05-23

申请号：US18426973

申请日：2024-01-30

Applicant: Samsung Display Co., LTD.

Inventor： SEHUI JANG ,  CHONGGUK LEE

IPC: H05K1/11 ,  G02F1/1345 ,  H01L25/18 ,  H05K1/02 ,  H05K1/18 ,  H10K59/131

CPC classification number: H05K1/118 ,  H05K1/0268 ,  H05K1/189 ,  G02F1/13452 ,  H01L25/18 ,  H05K2201/094 ,  H05K2201/09418 ,  H05K2201/09781 ,  H05K2201/10128 ,  H05K2201/10136 ,  H10K59/131

Abstract: A display device is provided and includes a display panel including a display area that displays an image and a pad area disposed at least at a side of the display area, and a flexible circuit film electrically connected to the pad area. The flexible circuit film includes connection pads, a first measurement pad, and a second measurement pad. The connection pads are arrayed in a first direction and inclined with respect to a reference line extending in a second direction different from the first direction, the first measurement pad is disposed adjacent to a first side of the connection pads, and the second measurement pad is disposed adjacent to a second side of the connection pads. The connection pads are between the first measurement pad and the second measurement pad.

公开(公告)号：US20240114620A1

公开(公告)日：2024-04-04

申请号：US18238144

申请日：2023-08-25

Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.

Inventor： Seung Min LEE ,  Francis SAYNES ,  Keun Woo KWON

IPC: H05K1/11 ,  H05K3/34

CPC classification number: H05K1/113 ,  H05K3/3452 ,  H05K2201/0939 ,  H05K2201/094 ,  H05K2201/099

Abstract: A printed circuit board includes a first insulating layer, a plurality of first and second pads disposed on the first insulating layer, and a solder resist layer disposed on the first insulating layer, the solder resist layer having a plurality of first and second openings respectively exposing at least portions of the plurality of first and second pads. The first pad has a closed region having a side surface covered by the solder resist layer, and an open region having a side surface exposed by the first opening. The second pad has only a closed region having a side surface covered by the solder resist layer.

公开(公告)号：US20240096378A1

公开(公告)日：2024-03-21

申请号：US18118725

申请日：2023-03-07

Applicant: Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

Inventor： Nobuhiro YAMAMOTO ,  Masahide TAKAZAWA

IPC: G11B33/12 ,  H05K1/02

CPC classification number: G11B33/124 ,  H05K1/0268 ,  H05K1/0326 ,  H05K2201/09063 ,  H05K2201/094

Abstract: According to one embodiment, an electronic device includes a wall and a substrate. The substrate is provided with an opening. The substrate includes an organic compound layer, a first surface of the organic compound layer, a second surface of the organic compound layer opposite the first surface, first wiring on the second surface, second wiring on the second surface, a first pad, and a second pad. The first surface is attached to the wall. The first pad is connected to the first wiring. The second pad is connected to the second wiring away from the first pad. The opening penetrates the organic compound layer to open to the first surface and the second surface between the first pad and the second pad.

公开(公告)号：US11909134B2

公开(公告)日：2024-02-20

申请号：US18190058

申请日：2023-03-24

Applicant: HUAWEI TECHNOLOGIES CO., LTD.

Inventor： Fei Yu ,  Shiping Cheng

IPC: H01R12/52 ,  H05K1/11 ,  H01R12/55 ,  H01R13/11 ,  H01R13/187 ,  H01R12/72 ,  H05K1/02

CPC classification number: H01R12/52 ,  H01R12/55 ,  H01R12/72 ,  H01R13/11 ,  H01R13/187 ,  H05K1/117 ,  H01R12/721 ,  H05K1/0219 ,  H05K1/0245 ,  H05K2201/0746 ,  H05K2201/094 ,  H05K2201/09145 ,  H05K2201/09236 ,  H05K2201/09336 ,  H05K2201/09409 ,  H05K2201/09427 ,  H05K2201/09709 ,  H05K2201/10325 ,  H05K2201/10356

Abstract: An edge connector includes a first row of golden fingers and a second row of golden fingers. The first row of golden fingers is adjacent to a plugging end of the edge connector, and the second row of golden fingers is adjacent to the first row of golden fingers. In a plugging direction of the edge connector, each golden finger in the first row of golden fingers has a first end proximate to the plugging end and a second end opposite to the first end. A first end of a grounded golden finger in the first row of golden fingers is protruded from other golden fingers, and second ends of two or more than two golden fingers in the first row of golden fingers are not aligned with each other.

公开(公告)号：US11784438B2

公开(公告)日：2023-10-10

申请号：US17293150

申请日：2020-09-15

Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.

Inventor： Naoshige Yokota ,  Masaki Suzuki

IPC: H01R12/00 ,  H01R13/6473 ,  H01R24/28 ,  H05K1/02

CPC classification number: H01R13/6473 ,  H01R24/28 ,  H05K1/025 ,  H05K2201/094 ,  H05K2201/09381 ,  H05K2201/09409 ,  H05K2201/09427 ,  H05K2201/09672 ,  H05K2201/1034 ,  H05K2201/10356

Abstract: A connector attached multi-conductor cable includes a multi-conductor cable and a connector that includes a circuit board including first to third surfaces. The circuit board includes first pads provided on the first surface and connected to central conductors of wires; second pads provided on the first surface, arranged in a first direction parallel to the third surface, and connected to the first pads; a first ground layer provided between the first and second surfaces, and extending in a second direction parallel to the first surface and perpendicular to the first direction; and a conductive member provided apart from the first pads in the second direction with respect to the second pads, and connected to the first ground layer. The conductive member is positioned on the first surface side with respect to the first ground layer in a third direction perpendicular to the first surface.

公开(公告)号：US20230284382A1

公开(公告)日：2023-09-07

申请号：US17894756

申请日：2022-08-24

Applicant: Kioxia Corporation

Inventor： Kodai Eguchi ,  Ichiro Ide

IPC: H05K1/11 ,  H01L23/50 ,  H05K1/18 ,  H05K3/34

CPC classification number: H05K1/111 ,  H01L23/50 ,  H05K1/181 ,  H05K3/3436 ,  H05K3/3478 ,  H05K3/3485 ,  H05K2201/09381 ,  H05K2201/094 ,  H05K2201/10734

Abstract: A semiconductor device includes a substrate including a signal pad and a non-signal pad, a semiconductor housing portion including a signal pin and a first non-signal pin, and first bonding members configured to bond the signal pad and the signal pin and to bond the first non-signal pad and the first non-signal pin. The first non-signal pad and the first non-signal pin each have an L shape in a plan view.

公开(公告)号：US11723143B1

公开(公告)日：2023-08-08

申请号：US17730856

申请日：2022-04-27

Applicant: Avago Technologies International Sales Pte. Limited

Inventor： Chang Kyu Choi ,  Hyun Mo Ku ,  Sarah Kay Haney ,  Li Sun

IPC: H05K1/02

CPC classification number: H05K1/0209 ,  H05K2201/0364 ,  H05K2201/062 ,  H05K2201/094 ,  H05K2201/09418 ,  H05K2201/10098 ,  H05K2201/10318

Abstract: A system and method for dissipating heat from a package and reducing interference between signaling pins is disclosed. The system includes a circuit substrate that includes a dielectric layer and at least one metal layer having an external surface. A plurality of metal posts is disposed on the external surface that function to a least one of dissipate heat from the circuit substrate, shield interfering signals between the signaling pins, and interact with mounting substrates on corresponding componentry. One or more metal posts are merged, increasing the interference shielding and heat dissipation functions of the metal posts.