公开(公告)号：US09276133B2

公开(公告)日：2016-03-01

申请号：US14184262

申请日：2014-02-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung-Hwan Kim ,  Jun-Kyu Yang ,  Hun-Hyeong Lim ,  Jae-ho Choi ,  Ki-Hyun Hwang

IPC: H01L27/115 ,  H01L29/792 ,  H01L29/66 ,  H01L21/28

CPC classification number: H01L29/7926 ,  H01L21/28282 ,  H01L27/11582 ,  H01L29/66833

Abstract: A method of manufacturing a vertical memory device is disclosed. In the method, a plurality of insulation layers and a plurality of first sacrificial layers are alternately stacked on a substrate. A plurality of holes is formed through the plurality of insulation layers and first sacrificial layers. A plasma treatment process is performed to oxidize the first sacrificial layers exposed by the holes. A plurality of second sacrificial layer patterns project from sidewalls of the holes. A blocking layer pattern, a charge storage layer pattern and a tunnel insulation layer pattern are formed on the sidewall of the holes that cover the second sacrificial layer patterns. A plurality of channels is formed to fill the holes. The first sacrificial layers and the second sacrificial layer patterns are removed to form a plurality of gaps exposing a sidewall of the blocking layer pattern. A plurality of gate electrodes is formed to fill the gaps.

Abstract translation: 公开了制造垂直存储器件的方法。 在该方法中，多个绝缘层和多个第一牺牲层交替堆叠在基板上。 通过多个绝缘层和第一牺牲层形成多个孔。 进行等离子体处理工艺以氧化由孔暴露的第一牺牲层。 多个第二牺牲层图案从孔的侧壁突出。 在覆盖第二牺牲层图案的孔的侧壁上形成阻挡层图案，电荷存储层图案和隧道绝缘层图案。 形成多个通道以填充孔。 去除第一牺牲层和第二牺牲层图案以形成暴露阻挡层图案的侧壁的多个间隙。 形成多个栅电极以填充间隙。