Chip-on-film packages and display apparatuses including the same

    公开(公告)号:US11508651B2

    公开(公告)日:2022-11-22

    申请号:US16874120

    申请日:2020-05-14

    Abstract: A chip-on-film package includes a base film having a top surface and a bottom surface, and a circuit region; a source driver chip and a gate driver chip mounted on the circuit region; a first conductive line on the top surface of the base film, a second conductive line on the bottom surface of the base film, and a conductive via that connects the first and second conductive lines to each other; a first row of bonding pads on the circuit region and connected to the source driver chip; a second row of bonding pads on the circuit region and connected to the source driver chip and the gate driver chip; and a test pad outside the circuit region and connected to the first and second conductive lines and the conductive via.

    CHIP-ON-FILM PACKAGES AND DISPLAY APPARATUSES INCLUDING THE SAME

    公开(公告)号:US20230077996A1

    公开(公告)日:2023-03-16

    申请号:US18051141

    申请日:2022-10-31

    Abstract: A chip-on-film package includes a base film having a top surface and a bottom surface, and a circuit region; a source driver chip and a gate driver chip mounted on the circuit region; a first conductive line on the top surface of the base film, a second conductive line on the bottom surface of the base film, and a conductive via that connects the first and second conductive lines to each other; a first row of bonding pads on the circuit region and connected to the source driver chip; a second row of bonding pads on the circuit region and connected to the source driver chip and the gate driver chip; and a test pad outside the circuit region and connected to the first and second conductive lines and the conductive via.

    CHIP-ON-FILM PACKAGES AND DISPLAY APPARATUSES INCLUDING THE SAME

    公开(公告)号:US20210074622A1

    公开(公告)日:2021-03-11

    申请号:US16874120

    申请日:2020-05-14

    Abstract: A chip-on-film package includes a base film having a top surface and a bottom surface, and a circuit region; a source driver chip and a gate driver chip mounted on the circuit region; a first conductive line on the top surface of the base film, a second conductive line on the bottom surface of the base film, and a conductive via that connects the first and second conductive lines to each other; a first row of bonding pads on the circuit region and connected to the source driver chip; a second row of bonding pads on the circuit region and connected to the source driver chip and the gate driver chip; and a test pad outside the circuit region and connected to the first and second conductive lines and the conductive via.

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