公开(公告)号：US11423815B2

公开(公告)日：2022-08-23

申请号：US17266019

申请日：2019-09-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Anjin Song ,  Juyong Kim ,  Junho Song

IPC: G09G3/00 ,  G06T7/70

Abstract: The disclosure relates to a display apparatus, a control method and a recording medium, the display apparatus including: a display; an information obtaining part; and a processor configured to: obtain an information on a plurality of viewing positions of a plurality of users regarding a screen of the display by the information obtaining part, identify a viewing position, on which a distribution is concentrated, among the plurality of viewing positions based on the obtained information, and control to compensate an image quality of an area corresponding to the identified viewing position among a plurality of areas of the screen based on a viewing angle at the identified viewing position.

公开(公告)号：US09928799B2

公开(公告)日：2018-03-27

申请号：US14851265

申请日：2015-09-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HaJun Lee ,  Jin-Han Kim ,  Junho Song ,  SeongJong Yoo ,  Yeonwoo Jung ,  Yong-Hun Kim ,  Keemoon Chun

IPC: G09G3/36

CPC classification number: G09G3/3688 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/0297 ,  G09G2310/08

Abstract: A source driver circuit is provided which includes a plurality of digital multi-spread (hereinafter referred to as “DMS”) blocks configured to generate DMS signals for controlling an output timing of a data signal to be transmitted to a display panel from a plurality of clocks which are delayed as much as a reference period one another. Each DMS block includes a plurality of sub blocks. Each of the sub blocks includes an enable signal generator and a delay unit. The enable signal generator generates an enable signal for outputting target DMS signals of the DMS signals using clocks selected from the plurality of clocks. The delay unit delays the DMS signals such that the DMS signals are sequentially delayed by the reference period.

公开(公告)号：US20160093237A1

公开(公告)日：2016-03-31

申请号：US14851265

申请日：2015-09-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： HaJun LEE ,  Jin-Han Kim ,  Junho Song ,  SeongJong Yoo ,  Yeonwoo Jung ,  Yong-Hun Kim ,  Keemoon Chun

IPC: G09G3/20

CPC classification number: G09G3/3688 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/0297 ,  G09G2310/08

Abstract: A source driver circuit is provided which includes a plurality of digital multi-spread (hereinafter referred to as “DMS”) blocks configured to generate DMS signals for controlling an output timing of a data signal to be transmitted to a display panel from a plurality of clocks which are delayed as much as a reference period one another. Each DMS block includes a plurality of sub blocks. Each of the sub blocks includes an enable signal generator and a delay unit. The enable signal generator generates an enable signal for outputting target DMS signals of the DMS signals using clocks selected from the plurality of clocks. The delay unit delays the DMS signals such that the DMS signals are sequentially delayed by the reference period.

Abstract translation: 提供了一种源驱动器电路，其包括多个数字多扩展（以下称为“DMS”）块，其被配置为生成DMS信号，用于控制要从多个数据传输到显示面板的数据信号的输出定时 时钟被延迟到另一个参考周期。 每个DMS块包括多个子块。 每个子块包括使能信号发生器和延迟单元。 使能信号发生器产生使能信号，用于使用从多个时钟中选择的时钟输出DMS信号的目标DMS信号。 延迟单元延迟DMS信号，使得DMS信号被顺序地延迟参考周期。