公开(公告)号：US10205020B2

公开(公告)日：2019-02-12

申请号：US15348586

申请日：2016-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongseok Lee ,  Jeongyun Lee ,  Gigwan Park ,  Keo Myoung Shin ,  Hyunji Kim ,  Sangduk Park

IPC: H01L29/78 ,  H01L29/66 ,  H01L27/092 ,  H01L29/06 ,  H01L29/423 ,  H01L21/8238 ,  H01L49/02 ,  H01L29/165

Abstract: A semiconductor device includes an active pattern having sidewalls defined by a device isolation pattern disposed on a substrate and an upper portion protruding from a top surface of the device isolation pattern, a liner insulating layer on the sidewalls of the active pattern, a gate structure on the active pattern, and source/drain regions at both sides of the gate structure. The liner insulating layer includes a first liner insulating layer and a second liner insulating layer having a top surface higher than a top surface of the first liner insulating layer. Each of the source/drain regions includes a first portion defined by the second liner insulating layer, and a second portion protruding upward from the second liner insulating layer and covering the top surface of the first liner insulating layer.