公开(公告)号：US09299800B2

公开(公告)日：2016-03-29

申请号：US14687488

申请日：2015-04-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyuk-soon Choi ,  Jung-hee Lee ,  Jai-kwang Shin ,  Jae-joon Oh ,  Jong-bong Ha ,  Jong-seob Kim ,  In-jun Hwang ,  Ki-ha Hong ,  Ki-sik Im ,  Ki-won Kim ,  Dong-seok Kim

IPC: H01L29/66 ,  H01L21/762 ,  H01L29/08 ,  H01L29/20 ,  H01L29/423 ,  H01L29/778 ,  H01L21/02 ,  H01L29/201 ,  H01L29/205 ,  H01L29/207

CPC classification number: H01L29/66462 ,  H01L21/0254 ,  H01L21/76237 ,  H01L29/0847 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/207 ,  H01L29/4236 ,  H01L29/7787

Abstract: The methods may include forming a first material layer on a substrate, increasing electric resistance of the first material layer, and forming a source pattern and a drain pattern, which are spaced apart from each other, on the first material layer, a band gap of the source and drain patterns greater than a band gap of a first material layer.

Abstract translation: 所述方法可以包括在衬底上形成第一材料层，增加第一材料层的电阻，以及在第一材料层上形成彼此间隔开的源图案和漏极图案，带隙为 源极和漏极图案大于第一材料层的带隙。