公开(公告)号：US20150028399A1

公开(公告)日：2015-01-29

申请号：US14308751

申请日：2014-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junjie Xiong ,  Dongho Cha ,  Myung Jin Kang ,  Kihoon Do

IPC: H01L29/417

CPC classification number: H01L29/45 ,  H01L21/02532 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/823814 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/41725 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848

Abstract: Provided are semiconductor devices and methods of manufacturing the same. The methods include providing a substrate including a first region and a second region, forming first mask patterns in the first region, and forming second mask patterns having an etch selectivity with respect to the first mask patterns in the second region. The first mask patterns and the second mask patterns are formed at the same time.

Abstract translation: 提供半导体器件及其制造方法。 所述方法包括提供包括第一区域和第二区域的衬底，在第一区域中形成第一掩模图案，以及形成相对于第二区域中的第一掩模图案具有蚀刻选择性的第二掩模图案。 同时形成第一掩模图案和第二掩模图案。

公开(公告)号：US09515150B2

公开(公告)日：2016-12-06

申请号：US14308751

申请日：2014-06-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junjie Xiong ,  Dongho Cha ,  Myung Jin Kang ,  Kihoon Do

IPC: H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L21/8238

CPC classification number: H01L29/45 ,  H01L21/02532 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/823814 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/41725 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848

Abstract: Provided are semiconductor devices and methods of manufacturing the same. The methods include providing a substrate including a first region and a second region, forming first mask patterns in the first region, and forming second mask patterns having an etch selectivity with respect to the first mask patterns in the second region. The first mask patterns and the second mask patterns are formed at the same time.

Abstract translation: 提供半导体器件及其制造方法。 所述方法包括提供包括第一区域和第二区域的衬底，在第一区域中形成第一掩模图案，以及形成相对于第二区域中的第一掩模图案具有蚀刻选择性的第二掩模图案。 同时形成第一掩模图案和第二掩模图案。

公开(公告)号：US10439033B2

公开(公告)日：2019-10-08

申请号：US15350425

申请日：2016-11-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junjie Xiong ,  Dongho Cha ,  Myung Jin Kang ,  Kihoon Do

IPC: H01L29/45 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/165 ,  H01L21/8238 ,  H01L21/02 ,  H01L21/768 ,  H01L27/092 ,  H01L29/08 ,  H01L29/16

Abstract: A semiconductor device can include a substrate with a first source/drain and a second source/drain in the substrate. A first ohmic contact pattern can be in an uppermost surface of the first source/drain, where the first ohmic contact pattern includes a first semiconductor alloyed with a first metal. A second ohmic contact pattern can be in an uppermost surface of the second source/drain, where the second ohmic contact pattern includes a second semiconductor that is different than the first semiconductor and is alloyed with a second metal that is different than the first metal.

公开(公告)号：US20170062579A1

公开(公告)日：2017-03-02

申请号：US15350425

申请日：2016-11-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Junjie Xiong ,  Dongho Cha ,  Myung Jin Kang ,  Kihoon Do

IPC: H01L29/45 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/165 ,  H01L21/02 ,  H01L21/8238 ,  H01L21/285 ,  H01L21/768 ,  H01L21/762 ,  H01L29/66 ,  H01L27/092 ,  H01L29/78

CPC classification number: H01L29/45 ,  H01L21/02532 ,  H01L21/76805 ,  H01L21/76895 ,  H01L21/823814 ,  H01L27/092 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/165 ,  H01L29/41725 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848

Abstract: A semiconductor device can include a substrate with a first source/drain and a second source/drain in the substrate. A first ohmic contact pattern can be in an uppermost surface of the first source/drain, where the first ohmic contact pattern includes a first semiconductor alloyed with a first metal. A second ohmic contact pattern can be in an uppermost surface of the second source/drain, where the second ohmic contact pattern includes a second semiconductor that is different than the first semiconductor and is alloyed with a second metal that is different than the first metal.

Abstract translation: 半导体器件可以包括在衬底中具有第一源极/漏极和第二源极/漏极的衬底。 第一欧姆接触图案可以在第一源极/漏极的最上表面中，其中第一欧姆接触图案包括与第一金属合金化的第一半导体。 第二欧姆接触图案可以在第二源极/漏极的最上表面中，其中第二欧姆接触图案包括与第一半导体不同的第二半导体，并且与不同于第一金属的第二金属合金化。