公开(公告)号：USD784307S1

公开(公告)日：2017-04-18

申请号：US29545541

申请日：2015-11-13

Applicant: Samsung Electronics Co., Ltd.

Designer： Kihyun Yoon

公开(公告)号：USD793932S1

公开(公告)日：2017-08-08

申请号：US29566717

申请日：2016-06-02

Applicant: Samsung Electronics Co., Ltd.

Designer： Kihyun Yoon ,  Jonghyuk Park

公开(公告)号：USD793314S1

公开(公告)日：2017-08-01

申请号：US29566709

申请日：2016-06-02

Applicant: Samsung Electronics Co., Ltd.

Designer： Kihyun Yoon ,  Jonghyuk Park

公开(公告)号：USD804447S1

公开(公告)日：2017-12-05

申请号：US29567057

申请日：2016-06-06

Applicant: Samsung Electronics Co., Ltd.

Designer： Kihyun Yoon ,  Jonghyuk Park

公开(公告)号：USD827020S1

公开(公告)日：2018-08-28

申请号：US29565438

申请日：2016-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Designer： Kihyun Yoon

公开(公告)号：US09711523B2

公开(公告)日：2017-07-18

申请号：US14574456

申请日：2014-12-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeonggil Lee ,  Yeon-Sil Sohn ,  Woonghee Sohn ,  Kihyun Yoon ,  Myoungbum Lee ,  Tai-Soo Lim ,  Yong Chae Jung

IPC: H01L27/11582

CPC classification number: H01L27/11582

Abstract: Provided is a semiconductor device, including gate structures on a substrate, the gate structures extending parallel to a first direction and being spaced apart from each other by a separation trench interposed therebetween, each of the gate structures including insulating patterns stacked on the substrate and a gate electrode interposed therebetween; vertical pillars connected to the substrate through the gate structures; an insulating spacer in the separation trench covering a sidewall of each of the gate structures; and a diffusion barrier structure between the gate electrode and the insulating spacer.

公开(公告)号：USD790241S1

公开(公告)日：2017-06-27

申请号：US29566641

申请日：2016-06-01

Applicant: Samsung Electronics Co., Ltd.

Designer： Kihyun Yoon ,  Jonghyuk Park