公开(公告)号：US12100596B2

公开(公告)日：2024-09-24

申请号：US17553049

申请日：2021-12-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunki Lee ,  Duck-Nam Kim ,  Keunhee Bai ,  Sae Il Son ,  Kwang-Ho You ,  Cheolin Jang

IPC: H01L21/308 ,  H01L21/027 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L21/3086 ,  H01L21/0273 ,  H01L21/31144 ,  H01L21/76811

Abstract: A method of manufacturing a semiconductor device includes forming an interlayer insulating layer on a substrate, forming a first mask layer on the interlayer insulating layer, forming a second mask layer and a first spacer on the first mask layer, forming a photoresist pattern on the second mask layer, forming a second mask pattern by patterning the second mask layer through a first etching process, forming a first mask pattern by patterning the first mask layer through a second etching process, forming a trench by etching a portion of the interlayer insulating layer through a third etching process, and forming an interconnection pattern within the trench. A width of the first mask pattern after the second etching process is less than a width of the photoresist pattern.

公开(公告)号：US20220293426A1

公开(公告)日：2022-09-15

申请号：US17553049

申请日：2021-12-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyunki Lee ,  Duck-Nam Kim ,  Keunhee Bai ,  Sae IL Son ,  Kwang-Ho You ,  Cheolin Jang

IPC: H01L21/308 ,  H01L21/027 ,  H01L21/311 ,  H01L21/768

Abstract: A method of manufacturing a semiconductor device includes forming an interlayer insulating layer on a substrate, forming a first mask layer on the interlayer insulating layer, forming a second mask layer and a first spacer on the first mask layer, forming a photoresist pattern on the second mask layer, forming a second mask pattern by patterning the second mask layer through a first etching process, forming a first mask pattern by patterning the first mask layer through a second etching process, forming a trench by etching a portion of the interlayer insulating layer through a third etching process, and forming an interconnection pattern within the trench. A width of the first mask pattern after the second etching process is less than a width of the photoresist pattern.