公开(公告)号：US11682648B2

公开(公告)日：2023-06-20

申请号：US17070540

申请日：2020-10-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changbo Lee ,  Kwanhoo Son ,  Joon Seok Oh

IPC: H01L23/00 ,  H01L23/522 ,  H01L21/768 ,  H01L23/31 ,  H01L21/56 ,  H01L21/683 ,  H01L23/528

CPC classification number: H01L24/20 ,  H01L21/566 ,  H01L21/6835 ,  H01L21/76871 ,  H01L23/315 ,  H01L23/5226 ,  H01L23/5283 ,  H01L24/11 ,  H01L24/13 ,  H01L24/19 ,  H01L2221/68359 ,  H01L2224/214

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The method comprises providing a carrier substrate that includes a conductive layer, placing a semiconductor die on the carrier substrate, forming an insulating layer to cover the semiconductor die on the carrier substrate, forming a via hole to penetrate the insulating layer at a side of the semiconductor die and to expose the conductive layer of the carrier substrate, performing a plating process in which the conductive layer of the carrier substrate is used as a seed to form a via filling the via hole, forming a first redistribution layer on a first surface of the semiconductor die and the insulating layer, removing the carrier substrate, and forming a second redistribution layer on a second surface of the semiconductor die and the insulating layer, the first surface and the second surface being located opposite each other.

公开(公告)号：US12199060B2

公开(公告)日：2025-01-14

申请号：US18143983

申请日：2023-05-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Changbo Lee ,  Kwanhoo Son ,  Joon Seok Oh

IPC: H01L23/522 ,  H01L21/56 ,  H01L21/683 ,  H01L21/768 ,  H01L23/00 ,  H01L23/31 ,  H01L23/528

Abstract: Disclosed are semiconductor devices and methods of fabricating the same. The method comprises providing a carrier substrate that includes a conductive layer, placing a semiconductor die on the carrier substrate, forming an insulating layer to cover the semiconductor die on the carrier substrate, forming a via hole to penetrate the insulating layer at a side of the semiconductor die and to expose the conductive layer of the carrier substrate, performing a plating process in which the conductive layer of the carrier substrate is used as a seed to form a via filling the via hole, forming a first redistribution layer on a first surface of the semiconductor die and the insulating layer, removing the carrier substrate, and forming a second redistribution layer on a second surface of the semiconductor die and the insulating layer, the first surface and the second surface being located opposite each other.