公开(公告)号：US20200091021A1

公开(公告)日：2020-03-19

申请号：US16357674

申请日：2019-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Jae Lee ,  Sang-Lok Kim ,  Byung-Hoon Jeong ,  Tae-Sung Lee ,  Jeong-Don Ihm ,  Jae-Yong Jeong ,  Young-Don Choi

IPC: H01L21/66 ,  H01L23/528

Abstract: A semiconductor device includes a semiconductor die, a defect detection structure and an input-output circuit. The semiconductor die includes a central region and a peripheral region surrounding the central region. The peripheral region includes a left-bottom corner region, a left-upper corner region, a right-upper corner region and a right-bottom corner region. The defect detection structure is formed in the peripheral region. The defect detection structure includes a first conduction loop in the left-bottom corner region, a second conduction loop in the right-bottom corner region, a third conduction loop in the left-bottom corner region and the left-upper corner region and a fourth conduction loop in the right-bottom corner region and the right-upper corner region. The input-output circuit is electrically connected to end nodes of the first conduction loop, the second conduction loop, the third conduction loop and the fourth conduction loop.

公开(公告)号：US11600539B2

公开(公告)日：2023-03-07

申请号：US17356152

申请日：2021-06-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Jae Lee ,  Sang-Lok Kim ,  Byung-Hoon Jeong ,  Tae-Sung Lee ,  Jeong-Don Ihm ,  Jae-Yong Jeong ,  Young-Don Choi

IPC: G01R31/64 ,  H01L21/66 ,  H01L23/528 ,  G01R31/3187

Abstract: A semiconductor device includes a semiconductor die, a defect detection structure and an input-output circuit. The semiconductor die includes a central region and a peripheral region surrounding the central region. The peripheral region includes a left-bottom corner region, a left-upper corner region, a right-upper corner region and a right-bottom corner region. The defect detection structure is formed in the peripheral region. The defect detection structure includes a first conduction loop in the left-bottom corner region, a second conduction loop in the right-bottom corner region, a third conduction loop in the left-bottom corner region and the left-upper corner region and a fourth conduction loop in the right-bottom corner region and the right-upper corner region. The input-output circuit is electrically connected to end nodes of the first conduction loop, the second conduction loop, the third conduction loop and the fourth conduction loop.

公开(公告)号：US11062966B2

公开(公告)日：2021-07-13

申请号：US16357674

申请日：2019-03-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Min-Jae Lee ,  Sang-Lok Kim ,  Byung-Hoon Jeong ,  Tae-Sung Lee ,  Jeong-Don Ihm ,  Jae-Yong Jeong ,  Young-Don Choi

IPC: H01L21/26 ,  H01L21/66 ,  H01L23/528 ,  G01R31/3187

Abstract: A semiconductor device includes a semiconductor die, a defect detection structure and an input-output circuit. The semiconductor die includes a central region and a peripheral region surrounding the central region. The peripheral region includes a left-bottom corner region, a left-upper corner region, a right-upper corner region and a right-bottom corner region. The defect detection structure is formed in the peripheral region. The defect detection structure includes a first conduction loop in the left-bottom corner region, a second conduction loop in the right-bottom corner region, a third conduction loop in the left-bottom corner region and the left-upper corner region and a fourth conduction loop in the right-bottom corner region and the right-upper corner region. The input-output circuit is electrically connected to end nodes of the first conduction loop, the second conduction loop, the third conduction loop and the fourth conduction loop.