公开(公告)号：US20240105842A1

公开(公告)日：2024-03-28

申请号：US18456934

申请日：2023-08-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sunghwan JANG ,  Dohee KIM ,  Pyung MOON ,  Sunguk JANG ,  Mina SEOL

IPC: H01L29/78 ,  H01L21/02 ,  H01L21/308 ,  H01L29/40

CPC classification number: H01L29/7827 ,  H01L21/02532 ,  H01L21/308 ,  H01L29/401

Abstract: In a method of manufacturing a semiconductor device, a first selective epitaxial growth (SEG) process is performed on a substrate to form a first channel. A first etching process is performed to form a first recess through the first channel and an upper portion of the substrate. A sidewall of the first channel exposed by the first recess is slanted with respect to an upper surface of the substrate. A second SEG process is performed to form a second channel on a surface of the substrate and the sidewall of the first channel exposed by the first recess. A gate structure is formed to fill the first recess. An impurity region is formed at an upper portion of the substrate adjacent to the gate structure.