公开(公告)号：US20220036632A1

公开(公告)日：2022-02-03

申请号：US17187729

申请日：2021-02-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Raun M. KRISCH ,  David C. TANNENBAUM ,  Moumine BALLO ,  Keshavan VARADARAJAN

IPC: G06T15/00 ,  G06T15/80 ,  G06F9/38 ,  G06F9/54

Abstract: A GPU includes one or more post-processing controllers, and a 3D graphics pipeline including a post-processing shader stage following a pixel shader stage. The one or more post-processing controllers may synchronize an execution of one or more post-processing stages including the post-processing shader stage. The 3D pipeline may include one or more pixel shaders, one or more tile buffers, and a direct communication link between the post-processing shader stage and the one or more tile buffers. The one or more post-processing controllers may synchronize communication between the one or more post-processing shaders and the one or more tile buffers.