公开(公告)号：US20220036632A1

公开(公告)日：2022-02-03

申请号：US17187729

申请日：2021-02-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Raun M. KRISCH ,  David C. TANNENBAUM ,  Moumine BALLO ,  Keshavan VARADARAJAN

IPC: G06T15/00 ,  G06T15/80 ,  G06F9/38 ,  G06F9/54

Abstract: A GPU includes one or more post-processing controllers, and a 3D graphics pipeline including a post-processing shader stage following a pixel shader stage. The one or more post-processing controllers may synchronize an execution of one or more post-processing stages including the post-processing shader stage. The 3D pipeline may include one or more pixel shaders, one or more tile buffers, and a direct communication link between the post-processing shader stage and the one or more tile buffers. The one or more post-processing controllers may synchronize communication between the one or more post-processing shaders and the one or more tile buffers.

公开(公告)号：US20210358191A1

公开(公告)日：2021-11-18

申请号：US17100796

申请日：2020-11-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Christopher P. FRASCATI ,  Raun M. KRISCH ,  Derek J. LENTZ ,  David C. TANNENBAUM

IPC: G06T15/00

Abstract: A GPU is disclosed, which may include a VRS interface to provide spatial information and/or primitive-specific information. The GPU may include one or more shader cores including a control logic section to determine a shading precision value based on the spatial information and/or the primitive-specific information. The control logic section may modulate a shading precision according to the shading precision value. A method for controlling shading precision by a GPU may include providing, by a VRS interface, the spatial information and/or primitive-specific information. The method may include determining, by a control logic section, a shading precision value based on the spatial information and/or the primitive-specific information. The method may include modulating a shading precision according to the shading precision value.

公开(公告)号：US20220066934A1

公开(公告)日：2022-03-03

申请号：US17086323

申请日：2020-10-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： David C. TANNENBAUM ,  Raun M. KRISCH ,  Christopher P. FRASCATI

IPC: G06F12/084

Abstract: A method for performing an atomic memory operation may include receiving an atomic input, receiving an address for an atomic memory location, and performing an atomic operation on the atomic memory location based on the atomic input, wherein performing the atomic operation may include performing a first operation on a first portion of the atomic input, and performing a second operation, which may be different from the first operation, on a second portion of the atomic input. The method may further include storing a result of the first operation in a first portion of the atomic memory location, and storing a result of the second operation in a second portion of the atomic memory location. The method may further include returning an original content of the first portion of the atomic memory location concatenated with an original content of the second portion of the atomic memory location.