公开(公告)号：US20240121957A1

公开(公告)日：2024-04-11

申请号：US18240017

申请日：2023-08-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myunghoon Han ,  Sehee Jang ,  Hyunho Kim ,  Jeehoon Han

IPC: H10B43/27 ,  H01L23/00 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

CPC classification number: H10B43/27 ,  H01L23/562 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/35

Abstract: A semiconductor device includes a gate electrode structure, a memory channel structure, a first division pattern, and first support patterns. The gate electrode structure includes gate electrodes spaced apart from each other on a substrate in a first direction perpendicular to an upper surface of the substrate, and each of the gate electrodes extends in a second direction parallel to the upper surface of the substrate. The memory channel structure extends through the gate electrode structure on the substrate. The first division pattern is formed on a sidewall of the gate electrode structure in a third direction parallel to the upper surface of the substrate and crossing the second direction, and extends in the second direction. The first support patterns are spaced apart from each other in the second direction on the first division pattern, and each of the first support patterns includes a conductive material.