公开(公告)号：US10061641B2

公开(公告)日：2018-08-28

申请号：US14580815

申请日：2014-12-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Namshik Kim ,  Tae-Hwan Kim ,  Daewook Kim ,  Biwoong Chung ,  Junjin Kong

IPC: G06F11/10 ,  G11C29/52 ,  G11C11/419

CPC classification number: G06F11/1012 ,  G11C11/419

Abstract: A storage device is provided which includes an ECC circuit. At a write operation, the ECC circuit generates a CRC (cyclic redundancy check) parity corresponding to data and generates an ECC (error correction code) parity corresponding to the data using an error correction code. At a read operation about the data stored in the at least one nonvolatile memory device, the ECC circuit corrects an error of the data using the CRC parity and the ECC parity.