Storage device and method for restoring meta data thereof

    公开(公告)号:US12072801B2

    公开(公告)日:2024-08-27

    申请号:US17973184

    申请日:2022-10-25

    Inventor: Tae-Hwan Kim

    CPC classification number: G06F12/0802 G06F12/0871 G06F2212/60

    Abstract: An operating method of a storage device, the method including; loading journal data from a non-volatile memory device, identifying a cache allocation flag included in the journal data, and restoring meta data corresponding to the journal data to a storage controller in response to the cache allocation flag. Here, the cache allocation flag is a first flag when the meta data are allocated to a meta cache of the storage controller, and the cache allocation flag is a second flag when the meta data are stored to a meta buffer of the storage controller.

    TEST DEVICE AND TEST SYSTEM FOR SEMICONDUCTOR DEVICES

    公开(公告)号:US20240175912A1

    公开(公告)日:2024-05-30

    申请号:US18384910

    申请日:2023-10-30

    CPC classification number: G01R31/2806

    Abstract: A test device includes a main board. First and second device under test (DUT) boards are disposed on the main board. First and second semiconductor devices are mounted on the first and second DUT boards, respectively. The first and second semiconductor devices are DUTs. First and second connectors are respectively disposed at a first end and a second end of the first DUT board. The first and second connectors are spaced apart from each other and respectively transmit first and second signals. The first signal forms a first electrical path along which the first signal is input to the first DUT board via the first connector. The second signal forms a second electrical path along which the second signal is output from the first DUT board and input to the second DUT board via the second connector.

    Memory system performing error correction of address mapping table

    公开(公告)号:US10514981B2

    公开(公告)日:2019-12-24

    申请号:US15718143

    申请日:2017-09-28

    Abstract: A memory system includes a nonvolatile memory device, a dynamic random access memory (DRAM) configured to store an address mapping table for an access to the nonvolatile memory device, and a controller configured to store, in the DRAM, the address mapping table that is divided in units of address mapping data, each of the units having a size of an interface of the DRAM, read, from the stored address mapping table, target address mapping data corresponding to a logical address that is received from a host, the target address mapping data including a target parity and physical addresses of the nonvolatile memory device, and perform an error correction on the read target address mapping data, using the target parity.

    Data compression apparatus, data compression method, and memory system including the data compression apparatus
    5.
    发明授权
    Data compression apparatus, data compression method, and memory system including the data compression apparatus 有权
    数据压缩装置,数据压缩方法以及包括数据压缩装置的存储系统

    公开(公告)号:US09407286B2

    公开(公告)日:2016-08-02

    申请号:US14017525

    申请日:2013-09-04

    CPC classification number: H03M7/3084

    Abstract: Provided are data compression method, data compression apparatus, and memory system. The data compression method includes receiving input data and generating a hash key for the input data, searching a hash table with the generated hash key, and if it is determined that the input data is a hash hit, compressing the input data using the hash table; and searching a cache memory with the input data, and if it is determined that the input data is a cache hit, compressing the input data using the cache memory.

    Abstract translation: 提供数据压缩方法,数据压缩装置和存储系统。 数据压缩方法包括:接收输入数据并产生用于输入数据的哈希密钥,用生成的散列密钥搜索散列表,以及如果确定输入数据是散列命中,则使用散列表压缩输入数据 ; 以及使用所述输入数据搜索高速缓冲存储器,并且如果确定所述输入数据是高速缓存命中,则使用所述高速缓冲存储器压缩所述输入数据。

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