MEMORY-INTERFACE CONVERTER CHIP
    1.
    发明公开

    公开(公告)号:US20240028208A1

    公开(公告)日:2024-01-25

    申请号:US17822649

    申请日:2022-08-26

    CPC classification number: G06F3/0613 G06F3/0629 G06F3/0679

    Abstract: A storage device including a memory interface chip. In some embodiments, the storage device includes: a controller integrated circuit; a first memory die; and a first converter integrated circuit, the first converter integrated circuit having a first external interface and a second external interface, the first external interface being a serial interface, the first external interface being connected to the controller integrated circuit, and the second external interface being a memory interface connecting the first converter integrated circuit to the first memory die.

    LAYERED READY STATUS REPORTING STRUCTURE

    公开(公告)号:US20220012196A1

    公开(公告)日:2022-01-13

    申请号:US17111188

    申请日:2020-12-03

    Abstract: A storage system includes a controller; a first storage device including a first ready/busy pin and a second storage device including a second ready/busy pin; a first data bus communicatively coupled between the controller, the first storage device, and the second storage device; and a first shared ready/busy signal channel communicatively coupled to the first ready/busy pin of the first storage device, the second ready/busy pin of the second storage device, and the controller according to a wire-sharing protocol, wherein the first storage device is configured to send the first device ID and status information associated with the first storage device to the controller via the first shared ready/busy signal channel and the second storage device is configured to send the second device ID and status information associated with the second storage device to the controller via the first shared ready/busy signal channel.

    PERFORMANCE CONTROL OF A DEVICE WITH A POWER METERING UNIT (PMU)

    公开(公告)号:US20220244773A1

    公开(公告)日:2022-08-04

    申请号:US17726527

    申请日:2022-04-21

    Abstract: Inventive aspects include a device including storage media. The device includes a PMU, and a controller communicatively coupled to the PMU. The PMU determines that an operating power of the device exceeds a threshold, and transmits a signal to the controller to trigger a power reduction operation. The controller throttles one or more operations until the operating power goes below the threshold. Some embodiments include a method for controlling performance of a storage device. The method includes measuring, by a PMU, a power consumption associated with a storage device. The method includes determining, by the PMU, whether the power consumption is greater than a threshold. In response, the method may include setting a performance throttle. The method may include determining, by the PMU, whether the power consumption is less than the threshold. In response, the method may include releasing the performance throttle.

    PERFORMANCE CONTROL OF A DEVICE WITH A POWER METERING UNIT (PMU)

    公开(公告)号:US20240219993A1

    公开(公告)日:2024-07-04

    申请号:US18610254

    申请日:2024-03-19

    CPC classification number: G06F1/3268 G01R21/133 G06F1/266 G06F1/3206 G06F1/324

    Abstract: Inventive aspects include a device including storage media. The device includes a PMU, and a controller communicatively coupled to the PMU. The PMU determines that an operating power of the device exceeds a threshold, and transmits a signal to the controller to trigger a power reduction operation. The controller throttles one or more operations until the operating power goes below the threshold. Some embodiments include a method for controlling performance of a storage device. The method includes measuring, by a PMU, a power consumption associated with a storage device. The method includes determining, by the PMU, whether the power consumption is greater than a threshold. In response, the method may include setting a performance throttle. The method may include determining, by the PMU, whether the power consumption is less than the threshold. In response, the method may include releasing the performance throttle.

    SYSTEMS, METHODS, AND APPARATUS FOR SECURITY KEY MANAGEMENT FOR I/O DEVICES

    公开(公告)号:US20220116205A1

    公开(公告)日:2022-04-14

    申请号:US17123100

    申请日:2020-12-15

    Abstract: A method for managing security keys for an I/O device may include loading a first security key from a primary memory to a security engine, performing a first data transfer operation between a host and the I/O device using the first security key with the security engine, loading a second security key from a secondary memory to the security engine, and performing a second data transfer operation between the host and the I/O device using the second security key with the security engine. The method may further include storing the first security key in the primary memory based on a frequency of use of the first security key. The frequency of use of the first security key may be determined by a pattern of transfers between the host and the I/O device.

    SIDEBAND AUTHENTICATION OF STORAGE DEVICE

    公开(公告)号:US20210227386A1

    公开(公告)日:2021-07-22

    申请号:US16809545

    申请日:2020-03-04

    Abstract: Various aspects include a continuous authentication system for a storage system. The continuous authentication system includes a host having an encryption unit. The continuous authentication system includes a storage device having a decryption unit. The continuous authentication system includes a first physical connection between the host and the storage device. The first physical connection may be configured to transfer I/Os. The continuous authentication system may include a second physical connection between the host and the storage device. The encryption unit may be configured to encrypt a continuous authentication signal. The host may be configured to transmit the continuous authentication signal through the second physical connection. The storage device may be configured to receive the continuous authentication signal through the second physical connection. The decryption unit may be configured to decrypt the continuous authentication signal. When the second physical connection is tampered with, the storage device may stop processing the I/Os.

    PERFORMANCE CONTROL OF A DEVICE WITH A POWER METERING UNIT (PMU)

    公开(公告)号:US20210223851A1

    公开(公告)日:2021-07-22

    申请号:US16803947

    申请日:2020-02-27

    Abstract: Inventive aspects include a device including storage media. The device includes a PMU, and a controller communicatively coupled to the PMU. The PMU determines that an operating power of the device exceeds a threshold, and transmits a signal to the controller to trigger a power reduction operation. The controller throttles one or more operations until the operating power goes below the threshold. Some embodiments include a method for controlling performance of a storage device. The method includes measuring, by a PMU, a power consumption associated with a storage device. The method includes determining, by the PMU, whether the power consumption is greater than a threshold. In response, the method may include setting a performance throttle. The method may include determining, by the PMU, whether the power consumption is less than the threshold. In response, the method may include releasing the performance throttle.

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