公开(公告)号：US12293098B2

公开(公告)日：2025-05-06

申请号：US18053919

申请日：2022-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongkyo Shim ,  Sang Soo Park

IPC: G06F3/00 ,  G06F3/06

Abstract: Disclosed is a nonvolatile memory device which includes a first plane that includes a plurality of memory blocks, a second plane that includes a plurality of memory blocks, an address replacing circuit that receives a first input address from an external controller, the first input address corresponding to a first memory block of the plurality of memory blocks of the first plane from an external controller and outputs a replaced address based on the first input address and bad block information, and an address decoder that controls word lines connected with a second memory block based on the replaced address, the word lines corresponding to the replaced address from among the plurality of memory blocks of the second plane. The first memory block of the first plane is a bad block.

公开(公告)号：US20230153001A1

公开(公告)日：2023-05-18

申请号：US18053919

申请日：2022-11-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongkyo Shim ,  Sang Soo Park

IPC: G06F3/06

CPC classification number: G06F3/064 ,  G06F3/0619 ,  G06F3/0656 ,  G06F3/0679

Abstract: Disclosed is a nonvolatile memory device which includes a first plane that includes a plurality of memory blocks, a second plane that includes a plurality of memory blocks, an address replacing circuit that receives a first input address from an external controller, the first input address corresponding to a first memory block of the plurality of memory blocks of the first plane from an external controller and outputs a replaced address based on the first input address and bad block information, and an address decoder that controls word lines connected with a second memory block based on the replaced address, the word lines corresponding to the replaced address from among the plurality of memory blocks of the second plane. The first memory block of the first plane is a bad block.

公开(公告)号：US11380386B2

公开(公告)日：2022-07-05

申请号：US17147557

申请日：2021-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo-Woong Lee ,  Doo-Ho Cho ,  Sang Soo Park ,  Yongkyu Lee

IPC: G11C16/12 ,  G11C11/4091 ,  G11C11/4094 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/4093 ,  G11C16/04 ,  G11C16/34 ,  G11C16/32 ,  G11C16/28

Abstract: Disclosed is a nonvolatile memory device, which includes a memory cell array that includes a plurality of memory cells, a page buffer circuit that is connected with the memory cell array through a plurality of bit lines and performs a sensing operation of sensing memory cells selected from the plurality of memory cells through the plurality of bit lines during a sensing time, an input/output circuit that performs a data output operation of outputting data from the page buffer circuit to an external device through data lines, and a sensing time control circuit that adjusts the sensing time when the data output operation is performed during the sensing time.