公开(公告)号：US20200230647A1

公开(公告)日：2020-07-23

申请号：US16488507

申请日：2018-02-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Won SHIM ,  Yonggu LEE ,  Joongsam YUN ,  Minkoo KANG

IPC: B06B1/02 ,  G06F3/01

Abstract: Disclosed are a method and an apparatus for converting a musical element so as to provide a vibration in an electronic device. According to various embodiments of the present invention, an electronic device may comprise: a display; a vibration generation apparatus for generating a vibration; and a processor functionally connected to the display and the vibration generation apparatus, wherein the processor is configured to: select multiple frequencies, using a musical element; set at least one vibration on the basis of the selected multiple frequencies; and generate a vibration pattern on the basis of the set vibration. Various elements are possible.

公开(公告)号：US20190164991A1

公开(公告)日：2019-05-30

申请号：US16200714

申请日：2018-11-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bong-soon LIM ,  Jin-Young KIM ,  Sang-Won SHIM ,  Il-han PARK

IPC: H01L27/11582 ,  H01L27/11573 ,  H01L25/18 ,  H01L23/535 ,  H01L27/11575 ,  H01L23/522 ,  H01L27/11565 ,  G11C16/08 ,  G11C16/04

Abstract: A nonvolatile memory device including: a first semiconductor layer including word lines, bit lines, first and second upper substrates adjacent to each other and a memory cell array, wherein the memory cell array includes a first vertical structure on the first upper substrate and a second vertical structure on the second upper substrate; and a second semiconductor layer under the first semiconductor layer, wherein the second semiconductor layer includes a lower substrate that includes row decoder and page buffer circuits, wherein the first vertical structure includes a first via area in which a first through-hole via is provided, wherein the first through-hole via passes through the first vertical structure and connects a first bit line and a first page buffer circuit, and the second vertical structure includes a first partial block, wherein the first partial block overlaps the first via area.

公开(公告)号：US20160012898A1

公开(公告)日：2016-01-14

申请号：US14858120

申请日：2015-09-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang-Won SHIM ,  Sang-Wan NAM ,  KITAE PARK

IPC: G11C16/10 ,  G11C16/26 ,  G11C16/34 ,  G11C16/04

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/26 ,  G11C16/3427 ,  G11C16/3459

Abstract: A program method of a nonvolatile memory device is provided, which includes programming a memory cell in one string selected from a plurality of vertical strings; determining whether a mode of operation of the nonvolatile memory device is a pre-pulse mode; when the mode of operation is determined to be the pre-pulse mode, applying a pre-pulse having a predetermined level to a string selection line connected with a gate of a string selection transistor of at least one unselected vertical string of the plurality of vertical strings for a particular time period; and performing a verification operation on the programmed memory cell.

Abstract translation: 提供了一种非易失性存储器件的编程方法，其包括以多个垂直字符串中选择的一个串中的存储器单元进行编程; 确定所述非易失存储器件的工作模式是否是预脉冲模式; 当操作模式被确定为预脉冲模式时，将具有预定电平的预脉冲施加到与多个垂直线中的至少一个未选择垂直弦的串选择晶体管的栅极连接的串选择线 特定时间段的字符串; 以及对所编程的存储单元执行验证操作。